Design Verification Engineer
Design Verification Engineer
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1 Vacancy
Job Description
Job Description
I have a client located in the San Jose CA area that has an opportunity for a Design Verification Engineer. If you or any of your colleagues are interested in discussing this role please click Apply Now.
You will be working as Applications / Design Verification Engineer for client that is involved in semiconductor verification technologies. The role entails customer support / presales collaboration on SoC verification projects.
Work with customers and product definition team. Product evaluations and deployment.
Direct hire position on W2 only. No Visa sponsorship or C2C available for this role.
$150000 $175000 bonus
Onsite or Local Hybrid preferred Remote will be considered as well
1020 Domestic travel
Requirements
- MS Degree 5 yrs S/W Development
- C/C and SystemVerilog/ UVM coding
- SoC and Semiconductor verification experience VMM OVM UVM
#VIS
Employment Type
Full-Time
