Verification Engineer Digital IP
Verification Engineer Digital IP
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Job Description
Job Title: Sr. Lead Verification Engineer
Primary Location: Bengaluru India
Role Summary:
We are part of MCU/MPU Engineering a central design organization within NXP developing products for multiple business lines in Automotive Internet of Things (IoT) Networking and Radio Frequency products with expertise in hardware engineering including architecture IP and full SoC Design.
MMEs Digital IP team produces design solutions covering the very wide range of SoCs required by the business lines. The team is challenged to produce industryleading solutions covering very costsensitive lowpower devices to highly integrated highperformance multicohort devices compliant with the latest automotive and industrial safety and security standards.
Job Responsibility:
- Responsible for the presilicon verification of IP modules or IP subsystems
- Responsible for defining and writing IP verification plans based on requirements documents (industry standards product requirements IP architecture and IP implementation specifications)
- Interface to HW FW and SW design teams as well as to architecture and system engineering teams to understand functionality and application of the IP or subsystem.
- Responsible for executing verification plan according to the product specification and verification requirements defined by product architects.
- Responsible for architecting developing debugging and running UVM based verification environment for RTL simulation.
- Define and develop test cases in an appropriate verification framework. Create stimulus and assertions run simulation debug test cases on the design models (RTL power aware RTL gate level FPGA Emulation platform) run regression collect and analyze code/functional coverage.
Job Qualification:
- Degree in Electrical Engineering or Computer Science with 2 years of experience on IP/SubSystem Verification
- Proven experience in testbench design and development using UVM methodology for IP/Subsystem and SOC.
- Advanced knowledge of Verilog System Verilog C/C Shell.
- High proficiency in Metric Driven Verification concepts functional and code coverage.
- High proficiency in directed and constrained random methodologies.
- Good knowledge of formal verification methodologies and assertions.
- Experience with debugging of designs pre and postsilicon in simulation and on the bench.
- Excellent written and verbal communication skill.
- Good knowledge in scripting like Perl TCL or Python is a plus
Employment Type
Full-Time
