Principal Signal Integrity Engineer
Principal Signal Integrity Engineer
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Salary Not Disclosed
1 Vacancy
Job Description
About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI automotive and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.
Your Team Your Impact
Are you ready to be at the forefront of technological innovationJoin Marvells MultiMarket Business Group Team and become a key player in shaping the future of data infrastructure. As a member of our team you will be responsible for creating Signal Integrity (SI) and Power Integrity (PI) design rules and apply them to achieve optimal performance for platform designs based on Marvells hyperscale cloud/AI enterprise and wireless infrastructure processors switches and more.
What You Can Expect
Perform simulations for signal integrity and power integrity analysis.
Perform handson high speed signal validation analysis and correlation including deembedding and interconnect characterization.
Power delivery modeling simulation and characterization for combined effects of die package board and voltage regulators.
Provide implementation guidelines and feedback to hardware and package design teams and occasionally to silicon design teams for electrical signal and power integrity including crosstalk insertion loss return loss jitter power supply noise etc.
PCB stackup review and layer assignment for highspeed interconnects and PDN.
Document procedures and methodologies to be adopted by other team members/teams.
What Were Looking For
Bachelors degree in electrical engineering or any other related field with 8 years of experience; or a Masters degree or Ph.D. in electrical engineering with 5 years of experience.
5 years of experience with HFSS ADS and other tools for simulations of PCBs for highspeed interfaces including 112G SerDes PCIe Gen5/Gen6 DDR5 LPDDR5x etc.
5 years of experience with DC IR drop and PDN analysis for boards with ADS Ansys Cadence tools.
Has strong fundamentals in 3D/2D EM simulation tools and transmission line theory.
Must be experienced in PCB/interposer design constraints routing feasibility and SI/PI design considerations to identify potential future performance issues and mitigate them in the design phase.
Excellent communication skills both verbal and written to effectively collaborate with crossfunctional teams including silicon packaging PCB design customers and present findings to the stakeholders.
Expected Base Pay Range (USD)
$ per annumThe successful candidates starting base pay will be determined based on jobrelated skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
At Marvell we offer a total compensation package with a base bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off 401k plus a yearend shutdown floating holidays paid time off to volunteer. Have a question about our benefits packages health or financial Ask your recruiter during the interview process.All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .
#LIMM1Required Experience:
Staff IC
Employment Type
Full Time
