Senior Digital IC Design Engineer
Senior Digital IC Design Engineer
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Not Disclosed
Salary Not Disclosed
1 Vacancy
Job Description
Must be a US Citizen
Minneapolis Minnesota (onsite/hybrid)
FullTime Health Benefits 401K Plan with profit sharing PTO Stock Option Plan
Job Description:
You will play a pivotal role in the development of customdesigned ASICs. Your expertise will span the entire chip design lifecycle from conceptualization to implementation. Youll collaborate with crossfunctional teams ensuring successful chip development while adhering to performance power and area targets. The right candidate will be someone with high aptitude who is currently hands on designing complex digital blocks with strong knowledge/experience across the complete ASIC/SOC design flow. An ideal candidate will additionally have experience with radiationhardened design analog/mixedsignal design and EDA and stdcell library development.
Additional duties include the evaluation of customer requirements and estimates of effort/expenses for potential new business and participation in identifying problems with and improvements to internal design methodologies.
Essential Duties and Qualifications:
Chip Architecture and Development
Lead the architectural design of ASICs based on highlevel requirements and block diagrams.
Collaborate with system architects to define chip functionality interfaces and performance targets.
Develop detailed specifications for the chips components.
RTL Design and Synthesis
Use Synopsys Design Compiler to create RTL (Register Transfer Level) designs.
Optimize RTL code for area power and performance.
Implement and verify complex digital blocks.
Constraint Development
Develop timing constraints for the entire chip.
Work closely with physical design teams to ensure successful placeandroute.
RISC Processor Conformance
Constrain and verify RISC processors within the chip.
Optimize processor performance and power efficiency.
Physical Design Collaboration
Collaborate with physical design teams on floorplanning placement and routing.
Address any design closure issues.
Verification Support
Work with verification engineers to ensure functional correctness.
Assist in creating testbenches and verifying the chips functionality.
Qualifications:
BSEE/MSEE or equivalent.
10 years of direct industry experience with ASIC and/or SoC design.
Proficiency in Synopsys Design Compiler and other EDA tools.
Strong understanding of digital design principles.
Familiarity with RISC architectures (e.g. ARM MIPS).
Excellent problemsolving skills and attention to detail.
A strong background in RTL based digital IC design using Verilog/SystemVerilog
Proven track record of firstpass successes.
A selfstarter with the ability to assume leadership roles.
Ability to work well in a diverse team environment.
Willingness to mentor junior engineers.
Experience with industry standard development tools and methodologies.
Additional Duties and Qualifications:
Modern revisioncontrol tools and bestpractices in a collaborative multisite design community.
Proficiency with UNIX/Linux incl. shell scripting text utilities (e.g. sed awk grep) using Modules highlevel programming such as C/C PERL/Python/TCL scripting.
Proficiency with Windows apps incl. Word Excel PowerPoint Visio Project PDF conversion.
Javier Leon
cell
www.LinkedIn/in/JavierLeon (are we connected)
Required Experience:
Senior IC
Employment Type
Full Time
