drjobs SerDes Circuit Design Engineer

SerDes Circuit Design Engineer

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Job Location drjobs

Beaverton, OR - USA

Monthly Salary drjobs

Not Disclosed

drjobs

Salary Not Disclosed

Vacancy

1 Vacancy

Job Description

We are seeking talented Analog MixedSignal designers to join our highspeed SerDes team. Our team specializes in building next generation highperformance wireline transceivers delivering intellectualproperty (IP) for Apples worldleading systemonchip (SOC). In this role you will actively work with crossfunctional Analog MixedSignal design teams to create execute and drive stateoftheart IPs key to Apples products. You will be challenged to make the bestinclass designs to surprise and delight Apple customers. With transforming the user experience in focus you will get an opportunity to work on designs which makes the best systems. This enables you to learn endtoend system while exceeding the highest expectations of quality innovation and efficiency.If you have strong fundamentals and a track record of tackling technical challenges If you are passionate about learning new skills and improving the value of your work If you like to be tuned to the biggerpicture while diving deeply into the details to innovate and tackle problems. We invite you to join and grow with our team.

Description

You will work on the development of highperformance and highspeed AMS circuits used in SerDes PHY including evaluation of different circuit topologies for specific product requirements (e.g. Rx CDR Tx bias generator highspeed clock generation and lowjitter distribution phase interpolator DLL VCO LDO) with best in class power performance and area (PPA).You will be leading discussions with crossfunctional teams (e.g. architecture SIPI packaging board design DFT ESD) to create and drive blocklevel specifications mixedsignal implementations and behavioral modeling. You will closely work with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these complex IPs on regular basis you will interact with your peers/management to communicate progress discuss new ideas and drive new implementations/concepts making it a rewarding and growthoriented work environment.

Minimum Qualifications

  • BSEE with 3 years of proven experience.

Key Qualifications

Preferred Qualifications

  • The ideal candidate should have deep understanding of analog mixedsignal design with experience in highspeed serial links.
  • Solid understanding and experience of designing analog mixed signal circuit blocks including Bandgap biasing circuits LDO regulators amplifiers comparators switchedcap circuits ADCs DACs Oscillators Filters
  • Solid understanding of analog mixedsignal concepts like mismatch mitigation linearity stability lowpower and lownoise techniques
  • Solid understanding and experience with digitally assisted analog design concepts (e.g. background calibrations LMS based adaptive loops)
  • Proven track record of working with system and architecture teams to drive blocklevel and IP requirements
  • Proven track record of working with large teams and guiding junior engineers
  • Experience with high speed digital circuits (e.g. serializer deserializer counters dividers etc. with solid understanding of digital design concepts
  • Experience and solid understanding of Tx/Rx equalization techniques and circuits (e.g. CTLE DFE deemphasis) for 64100 Gbps NRZ and PAM applications
  • Experience with EQ adaptation methods and circuit interactions to improve PPA
  • Solid understanding of CDR architectures and implementations
  • Experience in Analog Mixed Signal circuit modeling and performance evaluation (e.g. SystemVerilog Matlab Python VerilogAMS)
  • Handson experience to drive lab testing debug and data analysis
  • Handson experience in advanced CMOS technologies design with FinFet technology
  • Handson experience with AMS IC development from definition to highvolume production including layout supervision bench evaluation correlation and characterization
  • Experience in the following areas is a plus
  • Concepts of timing closure and related industry tools (e.g. Nanotime Primetime)
  • Concepts of IP delivery and quality checks
  • Knowledge of common highspeed SerDes protocols (e.g. PCIe USB DP MPHY) is highly desired
  • Skills in scripting and automation to enhance efficiency are highly desirable

Education & Experience

Additional Requirements

  • Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race color religion sex sexual orientation gender identity national origin disability Veteran status or other legally protected characteristics. Learn more about your EEO rights as an applicant.

Employment Type

Full Time

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