Designing and analyzing digital and analog circuits for memory products
Collaborating with various design and verification teams worldwide
Supporting Product Engineering Test Probe Process Integration Assembly and Marketing teams
Assisting with the design layout and optimization of Memory/Logic/Analog circuits
Understanding and analyzing circuit block wise and full chip level
Performing Static timing Analysis of DRAM block wise and top level analysis
Writing constraints and analyzing STA reports
Reporting violations to Design team and taking ownership for closure
Assisting in parasitic modeling design validation reticle experiments and required tapeout revisions
Overseeing and managing the layout process including floorplanning placement and routing
Performing verification processes with modeling and simulation using industry standard simulators
Contributing to cross group communication for standardization and group success
Working with Marketing Probe Assembly Test Process Integration and Product Engineering groups to ensure product manufacturability
Soliciting guidance from Standards CAD modeling and verification groups to improve design quality
Driving innovation for future memory generations
Engineering and designing chip layout circuits circuit checking documenting specifications
Modifying and evaluating semiconductor devices and components
Reviewing product requirements and logic diagrams for device definition
May review vendor capability to support product development
35 years of experience required.