Employer Active
Job Title: ASIC/RTL Design Engineer Senior
Work Location: La Jolla CA 92037
Duration: 9 Months
Work Type: Contract
Job Type: Onsite
JOB DUTIES:
Knowledge/Experience
Knowledge in running synthesis using Design Compiler or any equivalent tool.
Knowledge of standard cell different views used for physical implementation and timing
Creating basic timing constraints for synthesis
Use standard cells to do Place and route using tools like ICC2 or equivalent run physical verification
Run timing report on ICC2 implemented design for correctness.
Excellent working knowledge of experimenting with different std cells to validate the quality of the standard cell.
Expert in Tcl/Perl/Python scripting and Automation
Full Time