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Seniorstaff Engineer, Design Verification
Renesas has a growing presence in India with HC approaching 1000 and significant presence with active government and university collaboration as well as OSAT footprint (JV with CG India). With the growing importance of India as a market (Growing semiconductor market and government goals / mandates o...
Principal Engineermanager Design Verification
We are seeking an experienced and highly motivated Principal Engineer/Manager Design Verification to lead a team responsible for functional verification of complex digital IPs subsystems and SoC solutions. The ideal candidate will have deep expertise in verification methodologies strong people leade...
Staffsenior Staff Principal Engineer, Design Verif...
Be a part of endtoend verification execution for SOC owning complex digital IPs and subsystems from specification to signoffDefine and drive IPlevel verification strategies including test plans coverage models and closure criteriaDevelop scalable reusable UVMbased verification environments for IP an...
Accelerated Design Verification
Reduced post-silicon bug escapes through early software-driven validation in emulationenvironments. (Accelerated Verification) Cut SoC bring-up time by 50% by architecting a unified simulation-to-emulation testbenchwith reusable transactors. Spearheaded the Accelerated verification plan for a next-g...
Design Verification Manager, Ssg
As a Design Verification Manager you will contribute to exploring innovative hardware designs to enhance our devices. You will define verification methodology and implement test plans for advanced functional blocks while collaborating with cross-functional teams to develop world-class hardware devic...
Ethernet Design Verification Engineer
Ethernet Design Verification EngineerRole Summary: We are looking for an Ethernet DV Engineer to verify high-speed Ethernet IP and subsystems ensuring full protocol compliance and functional correctness prior to tapeout.Responsibilities:Develop and maintain UVM-based verification environments/testbe...
Member Of Technical Staff Design Verification
About ArchitectArchitect is a frontier AI lab for chip design. We build AI models and tools for on-demand custom ASICs at scale. Our goal is to co-design custom ASICs alongside evolving ML workloads and enable a new era of domain-specific chips that unlock capabilities impossible with current hardwa...
Aiml Driven Asic Design And Implementation Automat...
Job DescriptionAs an AI/ML driven ASIC Design and Implementation Automation Engineer you will work in a dynamic environment to explore methodology flows and tools to improve efficiency and quality of results (power performance area and verification) for SoC and IP development teams across the organi...