Wireless Design Engineer

Come join Apples growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level. All of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design Systems/PHY/MAC architecture and design VLSI/RTL design and integration Emulation Design Verification Test and Validation and FW/SW engineering.

In this highly visible role you will be at the center of a silicon design group with a critical impact on getting innovative and functional products to hundreds of millions of customers quickly. As a Wireless Design Engineer you will be responsible for RTL design of wireless MAC and its interface with the rest of the wireless SoC. You will interact with the software team wireless system team and design verification team to develop the best-in-class wireless MAC IPs that ensure the most advanced features and performance with optimal power and area trade-off.

In this role you will develop high performance low power ASIC design for wireless MACincluding:nWriting specifications and other documentsnMicroarchitecture definitionnRTL logic design IP integration and verification supportnRunning front end tools to ensure lint-free and CDC/RDC clean designnSynthesis and timing constraintsnPower analysis and optimizationnCollaboration with system and software team to ensure functionality performance and power efficiencynDevelop and maintain methodology/flow/checks for your design

BS and a minimum of 10 years relevant industry experiencenProven track record of high performance designs in high volume production for low power applicationsnSolid background in computer architecture including one or more of the following: Bus fabric especially APB/AHB/AXI Memory systems System debug architecture Power management with multiple power domains Encryption/decryption engines Integer and floating-point numeric units High-speed data path and control in ASIC design front end flows Lint CDC STA LECnKnowledge and experience in MAC layer of wired/wireless communication system preferrednKnowledge of wireless protocols such as Bluetooth WLAN or Zigbee preferred

5 years of hands-on experience in ASIC design flownSoC top-level integration experience and system architecture knowledge is a plusnProficiency in HDL languages such as Verilog / SystemVerilognScripting languages (Shell Perl Python) desirablenAbility to work well in a team and be productive under aggressive schedulenExcellent communication skills and self-motivation/organization