Technical Director, Digital IP Design and IP Architect

Role Summary

We are seeking a Technical Director with expertise in Digital IP Design and Verification. This role requires hands-on experience and ramp up in understanding many of the legacy digital IPs used across the NXP portfolio of products. The Technical Director must have a strong foundation in Verilog/System Verilog Design and must have experience building IPs such as AHB/AXI Bus Bridges Boot/Clock/Reset Management Peripheral controllers such as NoR Flash/PSRAM Controllers NAND Flash Controllers eMMC/SD Controllers and must have experience working with ARM M Class cores.

YourResponsibilities.

• Ramp up on the various digital IPs used across the NXP MCU/MPU portfolio of products. The Technical Director is expected to be hands-on and get familiar with the design and verification environment and will support the Change Requests across the legacy IPs.

• Collaborate with other IP Team members global SoC Systems and Software teams to ensure that IPs are being designed and verified to meet the requirements for the products.

• Provide debug and support for issues across SoCs in both pre-silicon and post silicon phase.

• Will lead the IP Architecture Specification for NOR/PSRAM/NAND Flash controllers and help with design development and verification. Modeling and development of ECC algorithms such as BCH Reed-Solomon and LDPC are highly desirable.

• Participate in post-silicon validation and debug activities identifying and resolving issues to ensure product quality.

• Provide technical guidance and contribute to continuous improvement of design processes and methodologies.

• Generates detailed design documentation including specifications and programming guides that can be used by the SW teams.

• Stay abreast of industry trends across the various peripherals(NOR NAND UFS NVMe etc.)

Required Qualifications

• Bachelors degree in electrical engineering Computer Engineering or a related field.

• Proven experience building digital IPs and supporting them across multiple generations of SoCs including post silicon support SW support and debug.

• Strong understanding of AHB and AXI bus protocols microprocessor architecture firmware development NOR Flash NAND Flash ECC (BCH Reed-Solomon etc.)

• Good understanding of Low Power Design Techniques

Desired Qualifications

• Masters degree in electrical engineering Electronics Engineering or related field.

• Minimum of 20 years of experience in digital IC design with a strong portfolio of successfully completed projects.

• Expertise in Verilog/SystemVerilog for RTL design and verification.

• Experience with industry-standard EDA tools for Verification synthesis STA

• Strong understanding of digital design principles experience building bus protocols(AHB AXI) NOR Flash/PSRAM Controllers NAND Flash Controllers and ECC expertise peripheral devices such as USB eMMC/SD Controllers

• Excellent problem-solving analytical and debugging skills.

• Strong communication and interpersonal skills with the ability to work effectively in a collaborative team environment.

• Ability to take initiative work independently and lead technical discussions.

The base salary range for this position is as mentioned below per year. We also provide competitive benefits incentive compensation and/or equity for certain roles.
Company benefits include health. dental and vision insurance. 401(k) and paid leave. Please note that the base salary range (OR hourly rate) is a guideline and individual total compensation may vary based on a number of factors such as qualifications skill level work location and other business and organizational needs. This base pay range is specific to California and is not applicable to other locations. A reasonable estimate of the base salary range as of the date of this posting is:

More information about NXP in the United States...

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age color national origin race religion creed gender sex sexual orientation gender identity and/or expression marital status status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal state or local addition NXP will provide reasonable accommodations for otherwise qualified disabled individuals.