TDL Hardware Manager FPGA and Digital Systems

Job Title: Senior Hardware Manager - Digital Systems

Job Code: EEM6

Job Location: Carlsbad California

Job Schedule: 9/80: Employees work 9 out of every 14 days- totaling 80 hours worked- and have every other Friday off

Job Description:

Lead the FPGA and digital-hardware engineering function for complex Tactical Data Links systems including architecture design development modification evaluation integration verification and production execution. Set technical vision and execution priorities while coordinating personnel lab resources tools and cross-functional support across wireless digital communications modems networking digital signal processing and electronic-warfare applications. Lead develop and retain a high-performing team of FPGA and digital-hardware engineers through clear priorities regular coaching performance management and career-development planning. Build the organizations technical bench by hiring strategically mentoring emerging leaders and aligning individual assignments with program needs and growth opportunities. Foster a culture of accountability collaboration inclusion and continuous improvement while ensuring workload staffing and technical resources are balanced across programs and priorities.

Essential Functions:

- Lead architecture design development modification evaluation integration and production support for FPGA and digital-hardware systems components and integrated circuitry.

- Create technical vision strategy staffing plans and execution priorities for the FPGA and digital-hardware team.

- Coordinate personnel laboratory resources tools and technical support required for programs proposals pursuits IRAD development integration production and sustaining work.

- Direct technical schedule and cost performance for FPGA and digital-hardware scope; review key technical decisions deliverables estimates risks and corrective actions.

- Guide the full design lifecycle from proposals and requirements definition through coding simulation synthesis place and route verification test and transition to production.

- Lead analysis test debug and evaluation activities that establish operating data validate designs and resolve technical risks.

- Set design approaches staffing priorities and technical parameters based on electrical requirements feasibility schedule cost reliability and long-term sustainability.

- Lead mentor develop and retain engineers and technical leaders; align workforce capability and resources with business priorities.

- Build a culture of innovation accountability transparency collaboration and continuous improvement while influencing engineering leaders customers suppliers and cross-functional partners.

- Partner with systems software RF mechanical manufacturing test program management and business development to align technology roadmaps proposals execution and customer commitments.

- Active or obtainable Secret security clearance.

Qualifications:

- Bachelors degree with a minimum of 12 years of prior related experience graduate degree with a minimum of 10 years of prior related experience or in lieu of a degree a minimum of 16 years of prior related experience.

Preferred Additional Skills:

- Strong root-cause analysis technical judgment and decision-making across multiple functions or business areas.

- Experience with VHDL or Verilog and implementation of complex modem or DSP circuits in programmable logic; comparable ASIC experience is applicable.

- Experience with discrete-time DSP digital communications high-speed DSP data paths digital filters FFTs error-correction codes Turbo or LDPC modulation demodulation and forward-error correction.

- Experience with high-speed serial interfaces Ethernet SPI UART SDRAM DDR JESD PCIe memory controllers and software-to-FPGA interfaces.

- Experience with laboratory debug techniques using digital scopes logic analyzers BERTs and other complex measurement devices.

- Working knowledge of testbench architectures MATLAB SystemC C or C; ability to read understand and review schematic drawings.

- Experience with Git Bitbucket JIRA and disciplined configuration management.

- Experience translating strategy into clear priorities staffing plans technical roadmaps and execution outcomes.

- Experience leading cross-functional engineering teams and providing compelling technical briefings to senior leaders.

- Broad management and cross-functional leadership knowledge with mastery in digital design electrical engineering or closely related technical areas.

- Demonstrated experience leading experienced professionals supervisors or managers in a complex technical environment.

- Strong background indigital design analysis integration simulation synthesis verification test evaluation and production support for complex hardware systems.

- Experience with wireless digital communications modems networking digital signal processing electronic warfare or comparable high-performance digital systems.

- Ability to communicate and influence leadership regarding matters of substantial importance to the function or business area.

In compliance with pay transparency requirements the salary range for this role in California is $153k - $ is not a guarantee of compensation or salary as final offer amount may vary based on factors including but not limited to experience andgeographic location. L3Harris also offers a variety of benefits including health and disability insurance 401(k) match flexible spending accounts EAP education assistance parental leave paid time off and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire schedule type and the applicability of collective bargaining agreements.