SoC Design & Verification Engineer

Job Title: SoC Design & Verification Engineer
Interview: Virtual
Job Duration: Long Term Contract
Job Location: Austin TX OR Bay Area CA

Job Description:

We are seeking experienced SoC Design & Verification Engineers to develop integrate and verify complex System-on-Chip (SoC) designs and IP blocks. The ideal candidate will have strong hands-on experience in RTL design and/or functional verification with expertise in Verilog/SystemVerilog UVM SoC architecture and industry-standard interfaces and verification tools.

Key Responsibilities:

• Design integrate and verify complex SoC/IP blocks.
• Develop RTL using Verilog/SystemVerilog.
• Develop UVM-based verification environments.
• Verify interfaces interconnects memory systems and SoC subsystems.
• Perform functional regression and coverage analysis.
• Debug simulation and RTL issues.
• Support SoC integration validation and sign-off.
• Work closely with architecture IP firmware and physical design teams.

Required Skills:

• Strong SoC design and/or verification experience.
• Proficiency in Verilog/SystemVerilog.
• Hands-on experience with UVM.
• Experience with AXI/AHB/APB or similar protocols.
• Strong understanding of SoC architecture and IP integration.
• Experience with VCS Verdi Questa or equivalent tools.

Preferred Skills:

• Experience with PCIe DDR USB Ethernet or other high-speed interfaces.
• Experience with CPU/GPU/NPU/accelerator integration.
• Silicon bring-up or post-silicon debug experience.

Required Skills:

ETHERNET FIRMWARE