Senior Electrical Engineer (FPGA High-Speed Mixed-Signal)

Key Responsibilities
1. FPGA-Based System Architecture

Define FPGA-centric system architectures for high-throughput data processing platforms

Partition functionality across FPGA ADC/DAC and host interfaces

Collaborate with FPGA/FW teams on interface definition timing and performance
2. High-Speed Digital & SerDes Design

Design and integrate high-speed interfaces including:
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DDR4/DDR memory subsystems
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PCIe Gen3/Gen4 interfaces
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QSFP (10G/25G/40G/100G) links
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10G SerDes channels

Define routing constraints stack-up and impedance control

Ensure signal integrity timing closure and link stability
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3. Mixed-Signal & Analog Front-End Design

Design and integrate:
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High-speed ADC/DAC signal chains
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Data Converter Architectures (DCA)
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Precision analog front-end (AFE) circuits

Develop circuits using low-noise OpAmps filters and gain stages

Optimize performance metrics such as SNR ENOB bandwidth and jitter sensitivity
4. Power System Design

Design multi-rail DC/DC power systems for FPGA and high-speed circuits

Manage power sequencing noise ripple and efficiency

Ensure power integrity for sensitive ADC and high-speed SerDes subsystems
5. Hardware Design & PCB Implementation

Own schematic design and hardware architecture (Xpedition preferred)

Guide PCB layout for high-layer-count high-speed boards

Lead design reviews focusing on SI/PI/EMI risks

Ensure manufacturability (DFM) and testability (DFT)
6. System Bring-up & Debug

Lead board bring-up and system integration:
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DDR training
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PCIe and SerDes link-up
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ADC performance validation

Debug issues related to:
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Signal integrity
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Jitter and noise
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Power coupling and system interaction

Use lab tools such as oscilloscopes TDR/VNA and protocol analyzers
7. Cross-Functional Collaboration

Work closely with FPGA firmware software mechanical and system engineering teams

Align electrical design with system-level performance requirements

Drive cross-domain trade-offs
8. Technical Leadership

Lead architectural decisions and technical reviews

Mentor junior engineers in high-speed and mixed-signal design

Drive structured problem-solving across complex systems
Required Qualifications

Bachelors or Masters degree in Electrical Engineering or related field

812 years of experience in high-speed FPGA or mixed-signal systems
Core Technical Requirements

FPGA-based system design experience

DDR4 memory subsystem design experience

PCIe / SerDes / high-speed link experience

ADC and analog front-end design experience

DC/DC power system design experience
Fundamentals

Strong understanding of:
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Signal Integrity (SI)
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Power Integrity (PI)
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High-speed timing and jitter analysis
Preferred Qualifications

Hands-on experience with FPGA platforms (Intel / Xilinx)

Experience with:
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High-speed data converters
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Optical interfaces / QSFP modules
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JESD204 or similar high-speed data links

Strong PCB design experience with high-speed constraints

Experience with tools such as:
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Xpedition (Mentor / Siemens)
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SI/PI analysis tools
Strong Plus

Experience in semiconductor equipment imaging or instrumentation systems

Experience with multi-board or modular systems

Understanding of signal-power-thermal coupling effects

Full product lifecycle experience (R&D NPI production)
Soft Skills

Strong ownership mindset and accountability

Ability to solve complex multi-domain engineering problems

Excellent communication and cross-functional collaboration skills