All Qualified candidates will be responded to in 24 hours or less
Clearance: Active Secret clearance or higher
This effort is on-Site
Employment type: Full Time - Direct
Benefits: including Health Dental Vision PTO Holiday etc...

Electrical Engineer FPGA Design

Position Summary

This onsite role supports FPGA design and verification for Raytheon digital products. The engineer will develop production-quality FPGA solutions from early concept through integration test and release.

Key Responsibilities

• Develop and verify VHDL FPGA designs for Xilinx Altera and Microsemi devices
• Support high-speed serial RF/EO DSP controls data links embedded processing and processor interfaces
• Translate system-level requirements into FPGA requirements architectures interfaces and CONOPS
• Perform partitioning coding simulation synthesis place-and-route and timing closure
• Verify designs using directed and constrained-random testing with functional and code coverage
• Create requirements verification plans user guides and configuration-controlled design documentation
• Support technical reviews integration troubleshooting and production releases

Required Qualifications

• FPGA development or verification experience
• VHDL design experience
• Experience with simulation synthesis place-and-route and FPGA verification
• Experience with directed and/or constrained-random test methodologies
• Experience working with systems engineers and circuit card designers
• Ability to support projects to schedule budget and technical requirements

Preferred Qualifications

• Xilinx Altera and/or Microsemi FPGA experience
• RF DSP EO high-speed serial data link or embedded processing experience
• Experience with coverage-driven verification
• Experience with FPGA requirements configuration management and controlled releases
• Aerospace defense or complex digital hardware experience

What Success Looks Like

• Delivers reliable production-ready FPGA releases
• Converts system requirements into clear FPGA architectures and implementations
• Closes verification coverage timing and integration issues efficiently
• Supports designs through test technical review and production release

#cj