DFT Engineer
Job Location:
Job Location:
Santa Clara County, CA - USA
Monthly Salary:
Not Disclosed
Monthly Salary:
Posted on:
5 hours ago
Posted on:
Vacancies:
1 Vacancy
Vacancies:
Job Summary
Hello
Hope you are doing Great!
This is Manoj Bandi from Siri info we have an immediate opportunity with one of our clients please go through the below JD and let me know your interest.
DFT Engineers
Location: Santa Clara California
Job Description & Skill Requirement
Required Skills & Qualifications
- 5 years of hands-on experience in DFT and ATPG for SoC or ASIC designs.
- Strong understanding of DFT fundamentals including controllability observability and scan-based testing.
- Proven expertise in ATPG pattern generation analysis and debug.
- Experience with MBIST including memory test architectures and diagnostics.
- Knowledge of IO test methodologies for interface- and pin-level validation.
- Solid understanding of clock DFT and clock verification concepts.
- Strong grasp of digital design and RTL fundamentals.
- Experience with industry standard DFT/ATPG EDA tools.
- Ability to work effectively in fast-paced high-performance semiconductor programs.
- Strong analytical problem-solving and communication skills.
Qualification
- Bachelor of Engineering (BE)
