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DFT Engineer
Job Location:
Job Location:
Santa Clara County, CA - USA
Monthly Salary:
Not provided by the employer
Monthly Salary:
Posted:
12 June 2026 (30+ days ago)
Posted:
Application Deadline:
9 September 2026
Application Deadline:
Vacancies:
1 Vacancy
Vacancies:
Job Summary
| Title | DFT Engineer |
| Location | Santa Clara California |
| Work Type | Full Time |
- Implement DFT solutions for Scan and MBIST architectures.
- Perform DFT insertion using Scan methodologies including SSN.
- Implement and verify MBIST repair solutions.
- Generate test timing and place-and-route collateral.
- Implement and support IJTAG (IEEE 1687) architectures.
- Interpret and work with ICL and PDL specifications.
- Verify DFT functionality and test structures.
- Support silicon validation and manufacturing test readiness.
- Collaborate with design verification and physical design teams.
- Siemens Tessent DFT tool suite.
- DFT insertion for Scan and SSN.
- MBIST implementation and repair verification.
- Test timing collateral generation.
- Place-and-route support.
- IJTAG (IEEE 1687) expertise.
- Strong understanding of ICL and PDL.
- DFT verification expertise.
- Boundary Scan
- JTAG
- Scan
- MBIST
- High-Speed IO
