Design Verification

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APPLE INC has the following available in Cupertino California and various unanticipated locations throughout the USA. Design and architect specifications and work closely with design u0026 micro-architecture teams. Understand the functional u0026 performance goals of the design. Develop test plans tests u0026 coverage plans as well as define our next generation verification methodology u0026 test benches. Communicate and collaborate with design architecture and software teams to understand the use cases and corner conditions and drive test cases. Ensure the quality of the SoC IP and/or subsystem by working on one or more types of IP such as Neural Engine hardware DRAM subsystems memory controller logic Encode and Decode systems for ProRes and other codec formats (such as VP9 and AV1) hardware security including cryptographic algorithm implementations) high-speed IO standards (such as PCI Express DisplayPort MIPI) power management and fabric infrastructure memory cache management and display subsystems for variety of panels and products.n 40 hours/week. At Apple base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $174149 - $225300/yr and your base pay will depend on your skills qualifications experience and location. nnPAY u0026 BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apples discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards and can purchase Apple stock at a discount if voluntarily participating in Apples Employee Stock Purchase Plan. Youll also receive benefits including: Comprehensive medical and dental coverage retirement benefits a range of discounted products and free services and for formal education related to advancing your career at Apple reimbursement for certain educational expenses including tuition. Additionally this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: Apple benefit compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Masters degree or foreign equivalent in Electrical Engineering or Computer Engineering or related field and 3 years of experience in the job offered or related 3 years of experience with each of the following skills is required:nnUtilizing SystemVerilog and UVM methodology to implement scalable and reusable verification environment and test cases to verify VCS xcelium or modelSim tools to run RTL gate and power aware formal verification tools (JasperGold) for connectivity assertion based functional and unreachability formal coverage tools (Mentor InFact Cadence vManager/IMC) for code and functional coverage analysis and C and/or C functional and performance models in knowledge in computer architecture and digital design in failure analysis and hardware waveform debug tools (Indago and Verdi) to triage and debug functional and performance and conducting test plans and test attributes based on design in scripting languages PERL tcl and python for aiding version control tools Perforce Git and Clearcase for source code control.

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