Applied ML Director (Technical Team Lead)
San Jose, CA - USA
Job Summary
About Us
Chips are at the center of todays tech-driven world. But how we design and verify them has not fundamentally changed in decades while their complexity and specialization have skyrocketed due to increasing performance demands from AI. We are a dynamic fast-moving team of software developers ML scientists and research-minded engineers on a mission to change that.
Operating with the agility of a startup but backed by industry-leading verification technologies we are part of the System Verification Group (SVG). Our charter is to developstate-of-the-artEDA software and hardware platforms (includingXcelium Jasper Palladium Protium and Helium) and supercharge them withcutting-edgeAI automation and advanced data-driven workflows.
About This Role
Cadence Design Systems is the leading provider of design automation tools for electronic and intelligent systems design. As theApplied ML Directorfor theChipStackSuperAgentTeam you will lead a highly technical group of ML and software engineers responsible for designing implementing and evaluating AI agents that enhance productivity across the semiconductor design lifecycle.
This is a true player-coach role. You will act as the technical backbone of the teamdeeply hands-on with architecture system design and codingwhile concurrently managing mentoring and scaling the engineering team. You will drive the technical roadmap for our agent infrastructure evaluation systems and production-grade AI capabilities integrated within Cadences EDA ecosystem. The ideal candidate pairs seasoned engineering leadership with practical in-the-weeds experience building scalable ML systems and agentic workflows.
Responsibilities
Lead & Mentor:Manage and grow a high-performing team of ML and software engineers. Foster a culture of technical excellence continuous learning and rapid execution.
Hands-On Technical Leadership:Drive the technical vision and actively contribute to the codebase. Design implement and review scalable infrastructure for AI agents within theChipStackSuperAgentecosystem.
Architect Production AI:Guidethe development of robust evaluation frameworks data pipelines retrieval systems (RAG) and context-engineering strategies to ensure consistent grounded and aligned agent behavior.
Operational Excellence:Oversee continuous integration automated testing and observability systems. Make high-level architectural decisions tooptimizesystem performance across latency cost reliability and scalability.
Cross-Functional Collaboration:Partner with product management research and core engineering teams to align the AI roadmap with overarching EDA platform goals.
Required Qualifications
Education:MS or PhD in Computer Science Computer Engineering ora relatedtechnical field.
Leadership Experience:3 years of direct engineering management or formal technical lead experience with a proventrack recordof successfully mentoring engineers and delivering complex projects.
Engineering Fundamentals:7 years of hands-on software engineering and ML experience. You mustpossessdeepexpertisein design refactoring debugging and testing distributed systemsand you should still be comfortable writing production-quality code today.
LLM Expertise:Deep understanding of large language models (LLMs) and the practical realities of deploying them in production (latency cost reliability monitoring and failure analysis).
System Evaluation:Experience designing rigorous evaluation frameworks for AI systems including benchmarking and regression testing.
Skills of Interest
Agent Architecture:Hands-on experience with reasonact loops planning/self-correction patterns tool/function calling persistent memory systems and structured outputs.
LLM Engineering:Familiarity with frontier LLMs and trade-offs across model families; practical experience with prompt engineering context management and model alignment techniques.
Retrieval & Data Systems:Deep understanding of RAG pipelines embeddings indexing strategies chunking methodologies and grounding techniques.
Infrastructure & Observability:Experience building logging tracing monitoring and evaluation systems specifically tailored for ML/AI applications.
Domain Interest:A strong interest in semiconductor design EDA workflows and high-performance computing environments (prior EDA experience is aplus butnot).
Our Culture
Challenge the status quo:We are innovators who challenge industry norms and push forward our vision of how silicon should be built.
Strong opinionsloosely held:We are low on ego but high on collaboration. We are okay to be wrong and are always open to learning.
Ship fast ship quality:We ruthlessly prioritize what matters. We build at lightningspeed butnever compromise on thehigh standardsrequired by the semiconductor industry.
Proud of our craft:Attention to detail is in our DNA. We take pride in what we build and go the extra mile to ensure an exceptional experience for our users.
The annual salary range for California is $178500 to $331500. You may also be eligible to receive incentive compensation: bonus equity and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications skill level competencies and work location. Our benefits programs include: paid vacation and paid holidays 401(k) plan with employer match employee stock purchase plan a variety of medical dental and vision plan options and more.
Required Experience:
Director
About Company
Do you want to shape the future of technology? Cadence is leading the charge to solve some of technology’s toughest challenges. We work with the world’s most innovative companies, across a growing range of industries. Major trends that you hear about everyday – like artificial intell ... View more