Sr. Mixed Signal Verification Engineer

MonolithicPowerSystemsInc.(MPS)---comejoinourteamandseehowYOUcanmakeadifference.

Job Description:

MonolithicPowerSystemsInc.(MPS)---comejoinourteamandseehowYOUcanmakeadifference.

Job Description:

ASr./Staff Mixed-Signal Design & Verification Engineerwill lead the Mixed-Signal Design and Verification tasks environment and developments of complex mixed-signal ICs utilizing leading edge technologies with industry standard ASIC tools. Products to be designed/verified may include power management signal management and mixed signal functions.

MPS products include: switching regulators sensors motor control display drivers audio amplifiers and power management ICs for fast-growing portable and non-portable markets such as notebooks cell phones telecom digital camera automobile and network equipment.

Essential Functions:

• Help and contribute with the training and mentorship of the MPS Mixed-Signal Design Team
• Supervision of multiple projects to meet the different quality metrics deliverables and the schedule
• Be part of the Mixed-Signal Design recruitment process
• Analog and Mixed-Signal Design Verification and Validation for projects
• Analog-Digital Interface Definition and Documentation.
• Behavioral Modelling of Analog Blocks. Analysis to verify architectural choices and trade-offs
• Analog and Mixed-Signal IP Definition Development Integration and Verification.
• Analog and/or Digital Mixed-Signal simulations and debugging.
• Assist the Digital Design Team with Timing Input/Outputs and DFT Constraints.
• Post-Silicon Validation and Characterization support.
• Close interaction and collaboration with Analog Design Analog Layout Digital Design Engineers Digital Verification and Digital Physical Engineers.

Qualifications:

• For Staff Position:BSEE 12 years of experience MSEE 8 years of experience
• For Sr. Position: BSEE 7 years of experience MSEE 5 years of experience in ASIC Mixed-Signal design.

• Has the ability to work independently and collaborate with other teams/departments.
• Very good leadership abilities to handle multiple projects and support other Mixed-Signal Designers.
• Solid knowledge of the full ASIC development and Silicon fabrication process.
• Strong background in transistor level and analog/mixed circuit design.
• Solid Understanding of device mismatches noise linearity and other analog effects.
• Solid knowledge of Layout design and best-practice techniques.
• Strong experience with simulation tools such as spectre hspice or others.
• Proficient with Cadence circuit design tools like ADE-L and ADE-XL.
• Solid understanding and experience in running complex simulations such as Monte-Carlo noise simulations and stability analysis.
• Experience running DRC and LVS using Calibre ICV etc.
• Experience running Verilog-AMS mixed-mode simulations.
• Verilog System Verilog and Verilog-A coding skills for behavioral modelling.
• Knowledge of DFT Techniques such as SCAN LBIST ABIST and IDDQ.
• Knowledge of STA and Mixed-Signal Timing and Input/Output Constraints for Syn and P&R.
• Excellent written/verbal communication skills and strong team work/collaboration.
• Knowledge/Experience with the following is a plus:

Automotive and ASIL Standards

Knowledge of power management industry/applications

I2C I3C SPI USB PMBUS

GitLab and Cliosoft SOS

Monolithic Power Systems Inc. (MPS) strives to build and maintain a culture of diversity equity and inclusion. We recognize that diverse voices and ideas make our company and our products stronger and we believe that our employees benefit when they are immersed in an inclusive culture of teamwork fairness and tolerance. We are mindful that creating an inclusive workplace that supports all employees is critical to our success.

A valid disability certificate will be considered a plus as part of our commitment to workplace inclusion and diversity.

Monolithic Power Systems Inc. (MPS) is an Equal Opportunity Employer and embraces diversity in our employee population. It is the policy of MPS to provide equal opportunity to all qualified applicants and employees without regard to race color religion sex sexual orientation gender identity national origin age disability protected veteran status or special disabled veteran marital status pregnancy genetic information or any other legally protected status.