Openchip And Software Technologies SL

About the jobWe are looking for an outstanding individual with expertise in sustainability and a holistic perspective on the environmental footprint of AI workloads. This person will play a key role in shaping and optimizing sustainability features for AI workloads collaborating close

About the jobWe are looking for an outstanding individual with expertise in sustainability and a holistic perspective on the environmental footprint of AI workloads. This person will play a key role in shaping and optimizing sustainability features for AI workloads collaborating close

The Role:As a Senior Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug S

The Role:As a Senior Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug S

The Role:The Senior DevOps Engineer will define and implement set of tools necessary for full software lifecycle in hybrid infrastructure ensuring the delivery of best-in-class software. This role is ideal for someone whos deeply experienced in Linux systems has a solid grasp of netwo

The Role:The Senior DevOps Engineer will define and implement set of tools necessary for full software lifecycle in hybrid infrastructure ensuring the delivery of best-in-class software. This role is ideal for someone whos deeply experienced in Linux systems has a solid grasp of netwo

As a Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulation Accele

As a Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulation Accele

The Role:As a Senior Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug S

The Role:As a Senior Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug S

Openchip is a European Silicon Engineering Company headquartered in Barcelona Spain. We aim to democratize the usage of Chips by developing Systems on Chip SOCs that combines RISC-V and accelerated chiplets for AI and HPC everything interconnected with UCIe open interfaces. Our techno

Openchip is a European Silicon Engineering Company headquartered in Barcelona Spain. We aim to democratize the usage of Chips by developing Systems on Chip SOCs that combines RISC-V and accelerated chiplets for AI and HPC everything interconnected with UCIe open interfaces. Our techno

The role:Openchip is building new RISC-V chips with security at heart enabling safer and more privacy-respectful execution of data processing workloads like AI models.As a Staff Security Software Engineer you will lead a team designing and implementing security features across Openchi

The role:Openchip is building new RISC-V chips with security at heart enabling safer and more privacy-respectful execution of data processing workloads like AI models.As a Staff Security Software Engineer you will lead a team designing and implementing security features across Openchi

The Role:Openchip is building exciting new RISC-V chips with HPC and AI acceleration. The Compilers team is developing the compilers both for traditional languages (C C Fortran) and for ML frameworks. As engineering lead your role will be to provide technical direction of the team men

The Role:Openchip is building exciting new RISC-V chips with HPC and AI acceleration. The Compilers team is developing the compilers both for traditional languages (C C Fortran) and for ML frameworks. As engineering lead your role will be to provide technical direction of the team men

We are actively seeking a Staff Engineer to join our dynamic and growing Digital design team.The Role:Responsibilities include but not limited to:to drive design execution of silicon design from definition through product launch and acts as primary point of contact for a IP/product de

We are actively seeking a Staff Engineer to join our dynamic and growing Digital design team.The Role:Responsibilities include but not limited to:to drive design execution of silicon design from definition through product launch and acts as primary point of contact for a IP/product de

Position overview:Develop low- (BIOS firmware device drivers) and mid-level software (emulation simulation and virtualization) to enable the use of OpenChips novel hardware features and accelerators bringing visible improvements to end users.Job responsibilities:Make independent techn

Position overview:Develop low- (BIOS firmware device drivers) and mid-level software (emulation simulation and virtualization) to enable the use of OpenChips novel hardware features and accelerators bringing visible improvements to end users.Job responsibilities:Make independent techn

The Role:As an AI Kernel optimization Engineer you will play a key role in pushing the limits of AI inference performance on Openchip RISC-V platforms.You will design implement and optimize AI compute kernels (Gen AI Large Language Model AI Vision CNNs etc) and runtime components to f

The Role:As an AI Kernel optimization Engineer you will play a key role in pushing the limits of AI inference performance on Openchip RISC-V platforms.You will design implement and optimize AI compute kernels (Gen AI Large Language Model AI Vision CNNs etc) and runtime components to f

The Role:We are seeking an exceptional AI Evaluation Engineer to design implement and scale frameworks for assessing the performance reliability and trustworthiness of advanced AI systems. This individual will be responsible for developing methodologies and tools to measure model qual

The Role:We are seeking an exceptional AI Evaluation Engineer to design implement and scale frameworks for assessing the performance reliability and trustworthiness of advanced AI systems. This individual will be responsible for developing methodologies and tools to measure model qual

The Role:As a Staff Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulation Ac

The Role:As a Staff Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulation Ac

The Role:We are building a security-first AI platform from the ground up designed to run large language models multi-agent systems and advanced AI workloads in zero-trust environments. Security safety and privacy are central to our mission with a vertically integrated approach that co

The Role:We are building a security-first AI platform from the ground up designed to run large language models multi-agent systems and advanced AI workloads in zero-trust environments. Security safety and privacy are central to our mission with a vertically integrated approach that co

The Role:As a Senior Formal Verification Engineer you will contribute to defining and leading the formal verification strategy for our systems.Responsibilities: Work closely with system architects and design team to establish formal verification environment and setting Guide the use o

The Role:As a Senior Formal Verification Engineer you will contribute to defining and leading the formal verification strategy for our systems.Responsibilities: Work closely with system architects and design team to establish formal verification environment and setting Guide the use o

The Role:Openchip is building new RISC-V chips with security at heart enabling safer and more privacy-respectful execution of data processing workloads like AI models. As a Senior Offensive Security Engineer you will help to ensure that our software and systems are designed and implem

The Role:Openchip is building new RISC-V chips with security at heart enabling safer and more privacy-respectful execution of data processing workloads like AI models. As a Senior Offensive Security Engineer you will help to ensure that our software and systems are designed and implem

The role:Openchip is building new RISC-V chips with security at heart enabling safer and more privacy-respectful execution of data processing workloads like AI models.As a Junior Security Software Engineer you will design and implement security features across Openchips software stack

The role:Openchip is building new RISC-V chips with security at heart enabling safer and more privacy-respectful execution of data processing workloads like AI models.As a Junior Security Software Engineer you will design and implement security features across Openchips software stack

We are actively seeking a design Engineer to join our dynamic and growing digital design team.The Role:Responsibilities include but not limited to:to write RTL code for specific/generic IP starting from IP specification.to validate the IP to ensure that it meet the specification requi

We are actively seeking a design Engineer to join our dynamic and growing digital design team.The Role:Responsibilities include but not limited to:to write RTL code for specific/generic IP starting from IP specification.to validate the IP to ensure that it meet the specification requi

We are looking for an outstanding individual with expertise in training large-scale AI models including Large Language Models (LLMs) or equivalent architectures. This person will play a key role in the development and optimization of AI workloads collaborating closely with hardware an

We are looking for an outstanding individual with expertise in training large-scale AI models including Large Language Models (LLMs) or equivalent architectures. This person will play a key role in the development and optimization of AI workloads collaborating closely with hardware an

We are actively seeking a Junior DFT Engineer to join our dynamic and growing Digital design team.The Role:Work on design execution of silicon designWork on SoC DFT architecture and DFM conceptWork on implementation and verification of DFT measures to meet product specifications and p

We are actively seeking a Junior DFT Engineer to join our dynamic and growing Digital design team.The Role:Work on design execution of silicon designWork on SoC DFT architecture and DFM conceptWork on implementation and verification of DFT measures to meet product specifications and p