Openchip And Software Technologies SL

The Role:As a Senior Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug S

The Role:As a Senior Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug S

The Role:The Senior DevOps Engineer will define and implement set of tools necessary for full software lifecycle in hybrid infrastructure ensuring the delivery of best-in-class software. This role is ideal for someone whos deeply experienced in Linux systems has a solid grasp of netwo

The Role:The Senior DevOps Engineer will define and implement set of tools necessary for full software lifecycle in hybrid infrastructure ensuring the delivery of best-in-class software. This role is ideal for someone whos deeply experienced in Linux systems has a solid grasp of netwo

As a Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulation Accele

As a Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulation Accele

The Role:As a Senior Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug S

The Role:As a Senior Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug S

The Role:We are seeking an exceptional AI Evaluation Engineer to design implement and scale frameworks for assessing the performance reliability and trustworthiness of advanced AI systems. This individual will be responsible for developing methodologies and tools to measure model qual

The Role:We are seeking an exceptional AI Evaluation Engineer to design implement and scale frameworks for assessing the performance reliability and trustworthiness of advanced AI systems. This individual will be responsible for developing methodologies and tools to measure model qual

The Role:As a Staff Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulation Ac

The Role:As a Staff Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulation Ac

Openchip is a European Silicon Engineering Company headquartered in Barcelona Spain. We aim to democratize the usage of Chips by developing Systems on Chip SOCs that combines RISC-V and accelerated chiplets for AI and HPC everything interconnected with UCIe open interfaces. Our techno

Openchip is a European Silicon Engineering Company headquartered in Barcelona Spain. We aim to democratize the usage of Chips by developing Systems on Chip SOCs that combines RISC-V and accelerated chiplets for AI and HPC everything interconnected with UCIe open interfaces. Our techno

The role:Openchip is building new RISC-V chips with security at heart enabling safer and more privacy-respectful execution of data processing workloads like AI models.As a Staff Security Software Engineer you will lead a team designing and implementing security features across Openchi

The role:Openchip is building new RISC-V chips with security at heart enabling safer and more privacy-respectful execution of data processing workloads like AI models.As a Staff Security Software Engineer you will lead a team designing and implementing security features across Openchi

The Role:Openchip is building exciting new RISC-V chips with HPC and AI acceleration. The Compilers team is developing the compilers both for traditional languages (C C Fortran) and for ML frameworks. As engineering lead your role will be to provide technical direction of the team men

The Role:Openchip is building exciting new RISC-V chips with HPC and AI acceleration. The Compilers team is developing the compilers both for traditional languages (C C Fortran) and for ML frameworks. As engineering lead your role will be to provide technical direction of the team men

We are actively seeking a Staff Engineer to join our dynamic and growing Digital design team.The Role:Responsibilities include but not limited to:to drive design execution of silicon design from definition through product launch and acts as primary point of contact for a IP/product de

We are actively seeking a Staff Engineer to join our dynamic and growing Digital design team.The Role:Responsibilities include but not limited to:to drive design execution of silicon design from definition through product launch and acts as primary point of contact for a IP/product de

Position overview:Develop low- (BIOS firmware device drivers) and mid-level software (emulation simulation and virtualization) to enable the use of OpenChips novel hardware features and accelerators bringing visible improvements to end users.Job responsibilities:Make independent techn

Position overview:Develop low- (BIOS firmware device drivers) and mid-level software (emulation simulation and virtualization) to enable the use of OpenChips novel hardware features and accelerators bringing visible improvements to end users.Job responsibilities:Make independent techn

The Role:As an AI Kernel optimization Engineer you will play a key role in pushing the limits of AI inference performance on Openchip RISC-V platforms.You will design implement and optimize AI compute kernels (Gen AI Large Language Model AI Vision CNNs etc) and runtime components to f

The Role:As an AI Kernel optimization Engineer you will play a key role in pushing the limits of AI inference performance on Openchip RISC-V platforms.You will design implement and optimize AI compute kernels (Gen AI Large Language Model AI Vision CNNs etc) and runtime components to f

The Role:As a Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulati

The Role:As a Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulati

We are looking for an outstanding individual with expertise in training large-scale AI models including Large Language Models (LLMs) or equivalent architectures. This person will play a key role in the development and optimization of AI workloads collaborating closely with hardware an

We are looking for an outstanding individual with expertise in training large-scale AI models including Large Language Models (LLMs) or equivalent architectures. This person will play a key role in the development and optimization of AI workloads collaborating closely with hardware an

The Role:As a Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulati

The Role:As a Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulati

At OpenChip we are building the future of hardware. Our mission is to revolutionize semiconductor design through open-source principles collaboration and radical innovation. We develop high-performance Systems-on-Chip (SoCs) that power tomorrows technologies. Our team is made up of br

At OpenChip we are building the future of hardware. Our mission is to revolutionize semiconductor design through open-source principles collaboration and radical innovation. We develop high-performance Systems-on-Chip (SoCs) that power tomorrows technologies. Our team is made up of br

We are looking for a talented and ambitious Rust Backend Engineer to help design and build the core infrastructure for our cloud-based AI deployment this role you will develop the scalable high-performance backend services that power the deployment orchestration and serving of AI mod

We are looking for a talented and ambitious Rust Backend Engineer to help design and build the core infrastructure for our cloud-based AI deployment this role you will develop the scalable high-performance backend services that power the deployment orchestration and serving of AI mod

The Role:As a visionary and technically adept security professional you will champion Openchips cutting-edge silicon and software security technologies across global markets driving strategic customer engagements fostering long-term partnerships and securing design wins that embed our

The Role:As a visionary and technically adept security professional you will champion Openchips cutting-edge silicon and software security technologies across global markets driving strategic customer engagements fostering long-term partnerships and securing design wins that embed our

The Role:The candidate will design an ultra-low power MLP hardware accelerator for image inference in Verilog. He/She will evaluate PPA parameters and benchmark the design with similar architecture from literature. Building on Openchips existing MLP design the candidate will have the

The Role:The candidate will design an ultra-low power MLP hardware accelerator for image inference in Verilog. He/She will evaluate PPA parameters and benchmark the design with similar architecture from literature. Building on Openchips existing MLP design the candidate will have the

The Role:Develop low- (BIOS firmware device drivers) and mid-level software (emulation simulation and virtualization) to enable the use of Openchips novel hardware features and accelerators bringing visible improvements to end users.Key responsibilities: Understand the technical lands

The Role:Develop low- (BIOS firmware device drivers) and mid-level software (emulation simulation and virtualization) to enable the use of Openchips novel hardware features and accelerators bringing visible improvements to end users.Key responsibilities: Understand the technical lands