ASICFPGA Design Engineer
ASICFPGA Design Engineer
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Job Description
Join the semify team and contribute to cutting-edge electronic products and digital design for ASICs and FPGAs. We're a young and growing company with exciting and innovative projects, and we're looking for a talented Digital Design Engineer to join our versatile team located in Graz, Austria. This is an opportunity to learn and grow your skills while working with experienced senior engineers who are committed to helping you succeed.
Tasks
As a Digital Design Engineer at semify, you will play a critical role in implementing and verifying digital designs, developing FPGA-based prototypes and directly interacting with our industry-leading customers to help them solve their problems. You'll be part of a dynamic and growing team that is dedicated to making an impact.
Requirements
As an ideal candidate for the position you:
- Good knowledge of at least one HDL description languages (SystemVerilog preferred)
- Can implement synchronous digital designs for ASICs or FPGAs
- Can understand and write Python scripts
- Are used to working with version control systems (Git preferred)
- Enjoy working in a distributed team
But most important - we welcome individuals who are willing to learn and grow with us.
Benefits
At semify, we believe in providing a flexible work environment that enables our team members to balance their personal and professional commitments. As such, we also welcome applications for our current position from individuals pursuing a work-friendly master's degree. The position itself offers a flexible weekly working schedule ranging from 20 to 38.5 hours, allowing you to tailor your work hours to your individual needs.
Employment Type
Full Time
