Principal Field Application Engineer-Transceiver

About Marvell

Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI and carrier architectures our innovative technology is enabling new possibilities.

At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.

Your Team Your Impact

What You Can Expect

As a Principal FAE you are not just supporting designsyou are shaping them. You will:

• Drive and own the technical engagement lifecycle from initial evaluation through production for Marvell PHY and PAM DSP transceiver solutions
• Influence and win strategic customer designs by partnering closely with Sales and delivering differentiated technical value
• Analyze customer architectures and translate system-level requirements into optimized solutions
• Serve as a trusted advisor to customers in hyperscale data center and networking markets
• Provide critical feedback to internal engineering and product teams to shape next-generation silicon

This role sits at the intersection of cutting-edge SerDes optical interconnects and AI-driven infrastructure making it both highly visible and deeply technical.

• Hands-on technical leadership working directly with top-tier customers
• Deep involvement in next-gen high-speed interfaces (112G/224G PAM4 and beyond)
• A fast-paced environment where your decisions directly impact multi-million-dollar design wins
• Opportunities to influence product direction and ecosystem strategy
• Exposure to the latest advancements in cloud AI infrastructure and high-performance networking

Key Responsibilities

• Lead technical design-in activities for Marvell PHY and transceiver products
• Support customer board bring-up debug and system validation
• Provide expert guidance on high-speed design and signal integrity challenges
• Develop customer-facing technical collateral (FAQs knowledge base articles design guides)
• Partner with internal teams to define future product requirements and tools
• Enable customers through training workshops and hands-on support

Work Model: This is a fully onsite role (5 days/week) based in Santa Clara CAdesigned to maximize collaboration lab access and real-time innovation.

What Were Looking For

Core Experience

• 8 years of experience in design systems or applications engineering
• Minimum 2 years in a customer-facing role (FAE or equivalent)
• Proven track record supporting or winning complex semiconductor/system designs

Technical Expertise

• Strong knowledge of high-speed interfaces such as SGMII XFI XAUI/RXAUI SFI
• Deep understanding of PAM4 and NRZ signaling SerDes architectures and mixed-signal ICs
• Experience with signal integrity high-speed PCB design and system-level bring-up
• Hands-on lab experience with:
  • High-speed oscilloscopes
  • Spectrum analyzers
  • Logic analyzers
  • Traffic generators

Systems & Debug

• Ability to review schematics and PCB layouts for high-speed designs
• Expertise in board bring-up debugging and root-cause analysis
• Strong collaboration with firmware and systems teams for validation and testing

Software & Automation

• Working knowledge of C and/or Python
• Ability to build scripts for test automation and data analysis

Customer & Communication Skills

• Excellent communication and presentation skills
• Ability to deliver technical training and influence engineering decisions
• Strong cross-functional collaboration with Sales Marketing and Engineering

Expected Base Pay Range (USD)

The successful candidates starting base pay will be determined based on job-related skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .

Interview Integrity

To support fair and authentic hiring practices candidates are not permitted to use AI tools (such as transcription apps real-time answer generators like ChatGPT or Copilot or automated note-taking bots) during interviews.

These tools must not be used to record assist with or enhance responses in any way. Our interviews are designed to evaluate your individual experience thought process and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations including the Export Administration Regulations (EAR). As such applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens lawful permanent residents or protected individuals as defined by 8 U.S.C. 1324b(a)(3) all applicants may be subject to an export license review process prior to employment.