Process Integration Lead- IJOP

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence inspiring the world to learn communicate and advance faster than ever.

Key Responsibilities Technical Execution & PI Ownership
Lead daytoday Process Integration execution for assigned DRAM modules within the Advanced Technology & Engineering (ATE) organization.
Own yield ramp stability and integration readiness for assigned scope during technology transfer pilot and early HVM phases.
Drive root cause investigations for top yield detractors using DOE SPC/FDC FMEA 8D and structured problemsolving methodologies.
Ensure process window margin manufacturability and reliability requirements are met and sustained.
Champion adoption of BestKnown Methods (BKM) and sitetosite learning to reduce variability and accelerate learning cycles. Technology Transfer & Ramp Support
Execute DRAM technology transfer activities from TD or donor fabs to ID1 under guidance from M2/M3 leadership.
Support new product introduction (NPI) process qualification and customer ramp readiness.
Coordinate interfab learning reviews gap assessments and corrective action followthrough.
Support extended international assignments (3 months) for training and technology transfer as required.

People Leadership & Coaching
Manage and develop a team of Process Integration engineers (NCG and experienced).
Provide technical guidance mentoring and coaching on PI fundamentals module ownership and execution rigor.
Set clear priorities expectations and deliverables aligned with ramp milestones and fab needs.
Conduct regular performance feedback and development planning for direct reports.
Foster a culture of accountability collaboration safety and continuous improvement.

CrossFunctional Collaboration
Serve as a primary PI interface with Manufacturing Equipment Yield Engineering Device TD Quality and Design teams.
Drive alignment and rapid issue resolution across functions to protect yield schedule and quality.
Communicate status risks and mitigation plans clearly to peers and management.

Operational Excellence
Execute and sustain process control strategies to ensure stable operations during ramp.
Ensure compliance with internal quality safety and audit requirements.
Leverage data and analytics to drive factbased decisions and continuous improvement.
Support offshift or flexible schedules as required during critical ramp phases.

Responsibilities:
Lead Process Integration execution and readiness for assigned DRAM modules during tech transfer and early HVM
Drive root cause investigations and yield improvement using DOE SPC/FDC FMEA 8D and structured problem solving
Ensure process margin manufacturability and reliability requirements are met and sustained
Manage and develop a team of PI engineers providing coaching priorities and technical guidance
Partner across Manufacturing Equipment Yield Device TD Quality and Design to drive alignment and resolve issues quickly Minimum Qualifications
Bachelors degree with a minimum 5years of HVM or FAB experience
-Minimum 3 years of experience in semiconductor fabrication areas such as yield ramp reduction of cost and quality improvement.
-Clear understanding of transistor operations scaling limitations and reliability
- Basic knowledge of CMOS and characterization methods Join our dynamic Process Integration team and contribute to the development and optimization of advanced semiconductor processes in a green field FAB environment. This experienced-level role offers hands-on experience in yield improvement cost reduction and technology transfer for next-generation devices. You will work in a fast-paced environment collaborating with cross-functional teams to ensure best-in-class quality and performance.

Key Responsibilities Technical Execution & PI Ownership
Lead daytoday Process Integration execution for assigned DRAM modules within the Advanced Technology & Engineering (ATE) organization.
Own yield ramp stability and integration readiness for assigned scope during technology transfer pilot and early HVM phases.
Drive root cause investigations for top yield detractors using DOE SPC/FDC FMEA 8D and structured problemsolving methodologies.
Ensure process window margin manufacturability and reliability requirements are met and sustained.
Champion adoption of BestKnown Methods (BKM) and sitetosite learning to reduce variability and accelerate learning cycles. Technology Transfer & Ramp Support
Execute DRAM technology transfer activities from TD or donor fabs to ID1 under guidance from M2/M3 leadership.
Support new product introduction (NPI) process qualification and customer ramp readiness.
Coordinate interfab learning reviews gap assessments and corrective action followthrough.
Support extended international assignments (3 months) for training and technology transfer as required.

People Leadership & Coaching
Manage and develop a team of Process Integration engineers (NCG and experienced).
Provide technical guidance mentoring and coaching on PI fundamentals module ownership and execution rigor.
Set clear priorities expectations and deliverables aligned with ramp milestones and fab needs.
Conduct regular performance feedback and development planning for direct reports.
Foster a culture of accountability collaboration safety and continuous improvement.

CrossFunctional Collaboration
Serve as a primary PI interface with Manufacturing Equipment Yield Engineering Device TD Quality and Design teams.
Drive alignment and rapid issue resolution across functions to protect yield schedule and quality.
Communicate status risks and mitigation plans clearly to peers and management.

Operational Excellence
Execute and sustain process control strategies to ensure stable operations during ramp.
Ensure compliance with internal quality safety and audit requirements.
Leverage data and analytics to drive factbased decisions and continuous improvement.
Support offshift or flexible schedules as required during critical ramp phases.

Responsibilities:
Lead Process Integration execution and readiness for assigned DRAM modules during tech transfer and early HVM
Drive root cause investigations and yield improvement using DOE SPC/FDC FMEA 8D and structured problem solving
Ensure process margin manufacturability and reliability requirements are met and sustained
Manage and develop a team of PI engineers providing coaching priorities and technical guidance
Partner across Manufacturing Equipment Yield Device TD Quality and Design to drive alignment and resolve issues quickly Minimum Qualifications
Bachelors degree with a minimum 5years of HVM or FAB experience
-Minimum 3 years of experience in semiconductor fabrication areas such as yield ramp reduction of cost and quality improvement.
-Clear understanding of transistor operations scaling limitations and reliability
- Basic knowledge of CMOS and characterization methods

Preferred Qualifications
-Masters or Ph.D. degree in Material science Electrical Electronics Chemical or Engineering areas
-Experience with TD Process Integration Device Yield analysis QR
-Experience working with 300mmsemiconductor environment.
-Solid knowledge of tech transfer and development
-Experience in SWR process transfer module ownership ramp up trend sustaining

Core Competencies
-Strong analytical and problem-solving skills.
-Effective communication and teamwork.
-Ability to work in a fast-paced time-sensitive environment.
-Respect for diversity and inclusion.

About Micron Technology Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich lifefor all. With a relentless focus on our customers technology leadership and manufacturing and operational excellence Micron delivers a rich portfolio of high-performance DRAM NAND and NOR memory and storage products through our Micron and Crucial brands. Every day the innovations that our people create fuel the data economy enabling advances in artificial intelligence and 5G applications that unleash opportunities from the data center to the intelligent edge and across the client and mobile user experience.

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