Role: Design Verification
Location: Markham ON
Contract
Skills: System Verilog & UVM
- DV engineer with 7-13 yrs of exp.
- Verification of display IP used in graphics card
- IP/SS and end to end testing for these blocks.
- Exp in DV flow including SV UVM
Role: Design Verification Location: Markham ON Contract Skills: System Verilog & UVM DV engineer with 7-13 yrs of exp. Verification of display IP used in graphics card IP/SS and end to end testing for these blocks. Exp in DV flow including SV UVM ...
Role: Design Verification
Location: Markham ON
Contract
Skills: System Verilog & UVM
- DV engineer with 7-13 yrs of exp.
- Verification of display IP used in graphics card
- IP/SS and end to end testing for these blocks.
- Exp in DV flow including SV UVM
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