Forward Deployed Engineer Semiconductor

About the team

OpenAIs Forward Deployed Engineering team partners with leading semiconductor companies to deploy production-grade AI systems across chip design verification and tooling workflows. We operate at the intersection of customer delivery and core platform development embedding deeply with customers to translate frontier model capabilities into systems that materially reduce design cycles improve verification quality and accelerate innovation.

Our work turns early high-touch deployments into repeatable solution patterns reference architectures and evaluation practices that scale across the semiconductor ecosystem from chip designers to EDA vendors and longer-term fabrication partners.

About the role

We are hiring a Forward Deployed Engineer (FDE) to lead end-to-end deployments of OpenAIs models inside semiconductor and chip design organizations. You will work with customers who are deep experts in hardware architecture RTL verification and performance engineering translating complex workflows massive codebases and long-running toolchains into production AI systems.

Your focus will span end-to-end semiconductor workflows from chip design and verification through tooling and manufacturing-adjacent systems. You will help expand OpenAIs footprint across the stack shaping how frontier models are applied throughout the semiconductor lifecycle.

You will measure success through production adoption cycle-time reduction engineer productivity gains and evaluation-driven feedback loops that inform product model and platform strategy. Youll work closely with Product Research GTM and Partnerships to turn early wins into a durable semiconductor vertical offering.

This role operates in environments where correctness scale and trust matter regressions cost weeks failures block tape-out and credibility is earned through technical rigor.

This role is based in San Francisco. We use a hybrid work model of 3 days in the office per week. We offer relocation assistance. Travel up to 50% is required.

In this role you will

• Design and ship production AI systems around models owning integrations with RTL repositories verification environments simulators and internal tooling.

• Lead discovery and scoping from pre-engagement through production rollout translating ambiguous engineering pain points into hypothesis-driven use cases with measurable outcomes.

• Deliver AI-powered verification workflows such as change-aware test selection directed test generation and intelligent regression triage taking them from prototype to daily production use.

• Build systems that operate over large evolving codebases and artifacts (RTL tests logs waveforms traces) where performance latency and failure handling shape architecture.

• Define and run evaluation loops that measure model and system quality against workflow-specific benchmarks (e.g. coverage false positives debug time iteration speed).

• Own delivery state across multiple workstreams making trade-offs between scope speed and robustness to protect production impact.

• Distill deployment learnings into hardened primitives reference implementations playbooks and tooling that can be reused across customers.

• Surface field insights that inform model behavior tooling gaps and future product direction across the semiconductor stack.
  

You might thrive in this role if you

• Bring 5 years of engineering experience in chip design verification EDA or FPGA development (including RTL design timing closure and hardware/software co-design) or closely adjacent systems domains such as firmware distributed systems compilers or performance-critical infrastructure.

• Have worked directly with RTL verification environments simulators or large-scale performance/debug tooling or have partnered closely with teams who do.

• Have delivered complex systems end-to-end in environments where scale correctness and long feedback loops shaped how you build and ship.

• Write and review production-grade code in Python and/or systems-adjacent languages and are comfortable integrating across heterogeneous toolchains.

• Have experience deploying or experimenting with LLM-powered systems and understand how model behavior evaluation and guardrails affect trust and adoption.

• Communicate clearly with hardware engineers software engineers product teams and executives translating technical trade-offs into delivery decisions.

• Apply systems thinking with high execution standards turning failures regressions and unexpected model behavior into improved operating patterns.

• Stay calm and decisive in technically deep high-stakes environments where progress depends on credibility and follow-through.

Success in this role means shipping AI systems that semiconductor engineers trust in their daily workflows establishing repeatable deployment patterns across chip design and verification and helping OpenAI become a long-term partner across the semiconductor ecosystem.

About OpenAI

OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core and to achieve our mission we must encompass and value the many different perspectives voices and experiences that form the full spectrum of humanity.

We are an equal opportunity employer and we do not discriminate on the basis of race religion color national origin sex sexual orientation age veteran status disability genetic information or other applicable legally protected characteristic.

For additional information please see OpenAIs Affirmative Action and Equal Employment Opportunity Policy Statement.

Background checks for applicants will be administered in accordance with applicable law and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws including the San Francisco Fair Chance Ordinance the Los Angeles County Fair Chance Ordinance for Employers and the California Fair Chance Act for US-based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct adverse and negative relationship with the following job duties potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary confidential and non-public addition job duties require access to secure and protected information technology systems and related data security obligations.

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Required Experience:

IC