Sr. Principal AE Verification IP, HPC Protocols

At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Title: AE - Verification IP High-Performance Computing (HPC) Protocols

Location: San Jose CA

Cadence is a pivotal leader in electronic design building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software hardware and IP that turn design concepts into reality. Cadence customers are the worlds most innovative companies delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer hyperscale computing 5G communications automotive aerospace industrial and health.

Job Summary:

In this role you bridge the gap between Cadences R&D and its customers by providing technical expertise for their Verification IP (VIP) portfolio. Drives development deployment of products and technologies and has material responsibility for the success of that product/technology. VIP Application Engineer is expected to be an expert in PCIe UCIe and AMBA domain of Verification IP family- protocol and product-wise. Main role is to help accelerate VIP portfolio adoption at Cadences top tier customers by supporting pre-sales technical activities.The role demands strong independent execution combined with close collaboration across global R&D Marketing Product Engineering Sales and Support teams to ensure full product alignment.This role requires approximately 10% travel on average.

Job responsibilities:

Conduct product demonstrations manage customer evaluations and run benchmarks to prove tool value

Deploy and integrate VIP into customer environments

Partner with Sales and Marketing to understand customer requirements and drive business closure

Effectively communicate with customers and PE/R&D teams and get an alignment on the requirements

Mentor junior engineers and provide technical training to customers to foster excellence and product adoption

VIP AI Technology Enablement for Customers

Build customer trust and relationship by delivering quality and timely solutions

Participate in evaluation and win new business

Experience and Technical Skills required :

8 years of Design Verification Experience

Experience with PCIe CXL UCIe UALink UEC protocols knowledge

Bachelors or Masters degree in Electrical Engineering Computer Engineering or related field.

Strong programming skills in Verilog System Verilog and UVM

Advanced skills in debugging pre-silicon verification failures using waveform viewers and simulation analysis tools

Excellent communication skills and the ability to thrive in a team-oriented environment

Self-motivated with a proactive approach to problem solving continuous learning and innovation

The annual salary range for California is $143500 to $266500. You may also be eligible to receive incentive compensation: bonus equity and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications skill level competencies and work location. Our benefits programs include: paid vacation and paid holidays 401(k) plan with employer match employee stock purchase plan a variety of medical dental and vision plan options and more.

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