System Verification Engineer

Mountain View, CA - USA

Monthly Salary: Not Disclosed

Posted on: 4 days ago

Vacancies: 1 Vacancy

Job Summary

Job Summary

We are seeking an experienced ASIC/FPGA Verification Engineer to support development of advanced microelectronics for space avionics and defense applications. This role focuses on verifying complex ASIC and FPGA designs using SystemVerilog and UVM methodologies.

Key Responsibilities

Develop and execute SystemVerilog/UVM-based testbenches for AXI-based and high-speed on-chip interfaces
Build reusable UVM verification components (drivers monitors scoreboards) for AXI and other AMBA protocols
Perform functional and code coverage analysis
Run simulations CDC checks and gate-level regressions
Support FPGA bring-up prototyping and hardware integration
Collaborate with cross-functional engineering teams

Required Qualifications

Bachelors degree in EE CE CS or related field
Strong experience with System Verilog and UVM
Experience in ASIC/FPGA verification and test bench development
Familiarity with Linux and scripting (Python/Perl)
Verified AXI-based interconnects and memory-mapped interfaces including development of UVM agents (driver monitor scoreboard) and protocol compliance checks
5 years of verification experience
Experience with FPGA prototyping and hardware emulation
Experience in verification of CPU GPU or hardware accelerators.
Experience in debugging and root cause failures and tracking verification completion using metrics
Experience in block IP subsystem and SoC-level verification using UVM.
EDA tools and scripting (Python Shell) used to build tools and flows for verification environments
Implementing Design Verification infrastructure (Testbench Functional coverage Regression setup)

Preferred Qualifications

Knowledge of high-speed interfaces (PCIe Ethernet JESD204C)
Experience with SVA and RTL design flows

Job Summary We are seeking an experienced ASIC/FPGA Verification Engineer to support development of advanced microelectronics for space avionics and defense applications. This role focuses on verifying complex ASIC and FPGA designs using SystemVerilog and UVM methodologies. Key Responsibilities ...