Senior Staff STPG NAND Product Development Engineer – Test Chip Vehicle

Our vision is to transform how the world uses information to enrich life for all.

Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity sustainability and giving back to our communities. Because doing so can fuel the very innovation we are pursuing.

As a senior individual contributor in System and Technology Product Group (STPG) you will provide technical leadership across the full learning loop of a test chip vehicle (TCV) - shaping pre-silicon simulation and regression strategy before tape-out driving silicon debug after bring-up and converting data into durable design model and methodology improvements for next-generation NAND flash memory products. This role is expected to independently identify risk define solutions and influence cross-functional technical direction.

Key Responsibilities

Pre-Silicon Simulation Coverage & Regression Ownership

• Own pre-silicon validation strategy for TCV partnering with Design Process and TD to define what must be proven in simulation versus silicon.
• Develop maintain and execute robust simulation and regression frameworks (functional parametric stress and corner) aligned to TCV objectives.
• Define coverage expectations and exit criteria for pre-silicon regressions identifying gaps and latent risks early.
• Analyze simulation results to surface architecture device and margin sensitivities driving design updates and tapeout readiness decisions.
• Establish and enforce simulation silicon correlation methodology to ensure modeling fidelity and learning continuity.

TCV Definition Bring-Up & Silicon Validation

• Provide technical ownership for TCV bring-up from first silicon through full characterization readiness.
• Define probe enablement trims operating conditions and debug strategies to accelerate stable and informative silicon access.
• Lead execution of electrical characterization plans validating array periphery and experimental features against design and process intent.
• Drive deep root cause analysis for silicon anomalies distinguishing design process model or test limitations.

Test Content & Methodology Leadership

• Architect TCV specific test modes patterns and flows to maximize learning efficiency and data quality.
• Partner with Test Solutions Engineering (TSE) to influence probe architecture and infrastructure supporting TCV for protocol evolution.
• Define voltage timing and temperature stress strategies to expose true design and process limits beyond nominal behavior.

Cross-Functional Technical Leadership & Influence

• Serve as a go-to technical expert across Design TD Process and Test for TCV and early silicon topics.
• Translate simulation and silicon findings into clear actionable recommendations that influence design fixes model updates and next generation architectures.
• Lead complex debug efforts with ambiguous data setting technical direction by crystalizing multifaceted information.
• Role-model technical leadership through active mentoring and talent development to support Microns long-term success.

Data Analysis Correlation & Knowledge Capture

• Spearhead AI adoption to perform advanced data analytics across large simulation and silicon datasets.
• Author high-impact technical documentation capturing learnings best practices and reusable methodologies for STPG and broader org consumption.

Requirements:

• Bachelors or post-graduate degree in Electrical/ Electronics/ Computer Engineering or related field with minimum 5 years of relevant industrial experience.
• Strong fundamentals in CMOS/ MOSFET device physics memory circuits and semiconductor devices.
• Demonstrated experience owning pre-silicon simulation/regression and post-silicon test/ validation for complex designs.
• Strong capability in data analysis and scripting (Python JMP or equivalent) applied to large datasets.
• Proven ability to drive ambiguous technical problems to closure with minimal supervision.
• Deep experience with NAND Flash architectures array/periphery interactions and test chips is preferred.
• Working knowledge of DFT probe test infrastructure and failure analysis.
• Experience with firmware-assisted test modes and experimental silicon features.
• Exposure to automation ML/AI or advanced analytics applied to simulation and silicon learning loops.
• Candidates may be considered for higher job grades if they exceed 10 years of relevant experience.

About Micron Technology Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich lifefor all. With a relentless focus on our customers technology leadership and manufacturing and operational excellence Micron delivers a rich portfolio of high-performance DRAM NAND and NOR memory and storage products through our Micron and Crucial brands. Every day the innovations that our people create fuel the data economy enabling advances in artificial intelligence and 5G applications that unleash opportunities from the data center to the intelligent edge and across the client and mobile user experience.

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