MTS ESD Design Engineer

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence inspiring the world to learn communicate and advance faster than ever.

Responsibilities will include but are not limited to ESD Architecture Leadership & Strategy

Define and own ESD architecture and protection strategy for high-speed I/O portfolios including:

• HBM (High Bandwidth Memory) / DDR / LPDDR PHY I/Os
• PCIe USB Ethernet MIPI and proprietary interfaces
• Lead ESDI/O codesign tradeoff decisions balancing: Aggressive ESD targets (HBM / CDM / MM).Ultralow capacitance and leakage requirements
• Eye margin jitter bandwidth return loss and impedance matching
• Drive architectural choices for: Snapback clamps rail clamps diode steering networks. Triggered and advanced ESD devices (technologydependent). Domain isolation and sequencing protection for sophisticated SoCs
• Advanced Circuit Design Modeling & Signoff: Perform and guide ESD circuit design and analysis at block and fullchip level.
• Establish simulation methodologies for: Transient ESD stress (TLPequivalent behavior). Dynamic clamp triggering and current handling. I/O performance impact (cap loading ringing overshoot/undershoot.
• Own ESD modeling correlation: Work with device/modeling teams on compact models (dynamic R triggering CV behavior). Drive correlation between SPICE simulations TLP/VFTLP and silicon results. Act as the final technical authority for ESD Design reviews and signoff.
• Silicon Debug Reliability & Qualification Ownership: Lead silicon-level ESD failure analysis across products and generations.
• Drive root cause analysis for: HBM/CDM failures. Leakage and performance degradation. Latchup and substratecoupling issues
• Collaborate deeply with reliability: Define corrective actions and preventive methodologies. Own ESD qualification strategies and ensure firstpass silicon success.
• Physical Design Layout & Technology Engagement: Define company-wide layout guidelines for ESD devices. Current uniformity ballasting guard rings. Substrate/well engineering and isolation standard processes. Power clamp placement and return path integrity
• Partner with technology process and PDK teams to: Influence ESD-friendly process features. Enable scalable ESD solutions in sophisticated node & Ensure ESD robustness across multiple packages and IO ring configurations.
• Multi-functional & Interpersonal Leadership: Serve as the ESD subject-matter guide (SME) across the organization.
• Provide strategic guidance to: I/O and PHY design teams. PDN package and board-level engineers. Product engineering and manufacturing. Mentor and technically develop junior and senior ESD/design engineers & Drive methodology reuse IP standardization and design standard processes across programs.
• Consistent track record of: Delivering production silicon meeting aggressive ESD and performance targets. Leading ESD technical decisions for sophisticated highvolume products.
• Deep expertise in: HBM CDM MM latchup mechanisms & High-speed signal integrity fundamentals and constraints
• Strong command of: SPICE-based simulators (Spectre HSPICE) & Physical layout review and ESD signoff flows
• Leadership & Soft Skills: Recognized technical authority with strong executivelevel interpersonal skills. Ability to make and defend datadriven architectural tradeoffs. Mentorfirst attitude with passion for growing technical talent. Comfort operating in ambiguous fastpaced firstprinciples problem spaces.

What Success Looks Like

• ESD requirements consistently met without compromising high-speed I/O performance.
• Predictable siliconcorrelated ESD signoff across projects.
• Reusable ESD IP and methodologies deployed across multiple products and nodes.

Requirements/Qualification

• / / PhD in Electrical / Electronic Engineering or related team.
• 15 years of handson experience in: ESD circuit design and protection architecture& High-speed I/O or mixed-signal chip environments Department Intro... A few sentences about the department here.

About Micron Technology Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich lifefor all. With a relentless focus on our customers technology leadership and manufacturing and operational excellence Micron delivers a rich portfolio of high-performance DRAM NAND and NOR memory and storage products through our Micron and Crucial brands. Every day the innovations that our people create fuel the data economy enabling advances in artificial intelligence and 5G applications that unleash opportunities from the data center to the intelligent edge and across the client and mobile user experience.

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