Intern Design Engineering
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Job Location:
Monthly Salary:
Posted on:
21 hours ago
Vacancies:
1 Vacancy
Job Summary
At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology.
About the team:
Our team deliver many high-performance products based on the industrys advanced technology with high frequencies up to 6400MHz. Our product processes include TSMC 3nm/5nm/7nm/12nm and Samsung 4nm/5nm/7nm/8nm/10nm the team you will face great challenges such as FP CTS STA etc. At the same time you will get rich experience and advanced methodology.
Focus on high speed digital DDR and HBM IP physical implementation develop necessary scripts or tools to enhance current PD design flow. Work in product projects including but not limited to: complete the project tasks; solve design issue and provide flow to check and avoid similar issue; analyze and summarize PPA optimization methodologies and results implement optimal design parameters and flows for different projects.
实习 - 数字后端工程师 (工作地点上海)
职位描述
(1)芯片物理设计 后端布局布线STA物理验证等
(2)团队合作负责电路后端设计及交付设计质量和进度控制
职位需求
(1)微电子电子工程硕士以上学历
(2)较强的问题分析以及团队合作能力
(3)较强的中英文口语沟通及写作能力
(4)熟悉数字后端工具
(5)积极主动 有责任心
**每周可以工作至少3天实习期6-8个月
Were doing work that matters. Help us solve what others cant.
Required Experience:
Intern
About Company
Do you want to shape the future of technology? Cadence is leading the charge to solve some of technology’s toughest challenges. We work with the world’s most innovative companies, across a growing range of industries. Major trends that you hear about everyday – like artificial intell ... View more
