Principal Physical Design Engineer

About Marvell

Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI and carrier architectures our innovative technology is enabling new possibilities.

At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.

Your Team Your Impact

Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.

Your Team Your Impact
Built on decades of expertise and execution Marvells custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data infrastructure intellectual property (IP) and a wide array of flexible business this unique role youll have the opportunity to work on both the physical design and methodology for future designs of our next-generation high-performance processor chips in a leading-edge CMOS process technology targeted at server and networking applications.

The CelestialAI team are building next-generation 50G/100G optical link solutions for data-centric computing leveraging advanced silicon photonics integrated with cutting-edge CMOS electronics.

This role is located at our Irvine California office. Working at a different location is not offered at this time. Relocation will be provided for qualified candidates.

What You Can Expect

As a senior leader in the design team you will:

• Shape the long-term vision for physical design capabilities and infrastructure in alignment with company-wide technology strategy

• Lead RTL-to-GDSII implementationfor multiple SoC programs overseeing synthesis floorplanning power grid design place and route clock tree synthesis timing closure power/signal integrity signoff and physical verification (DRC/LVS)

• Providestrategic leadership and technical directionto physical design teams ensuring successful and timely tapeouts of complex high-performance SoCs

• Mentor and develop engineering talent fostering a culture of innovation collaboration and continuous improvement

• Drive cross-functional collaboration with design teams to influence design decisions and ensure successful project execution

• Navigate and resolve cross-functional conflicts effectively fostering alignment and maintaining momentum across diverse teams

• Drive thedevelopment and adoption of next-generation physical design methodologies flows and automation to improve productivity and design quality

What Were Looking For

• Bachelors degree in Computer Science Electrical Engineering or related fields and 5-10 years of related professional experience or Masters degree and/or PhD in Computer Science Electrical Engineering or related fields with 3-5 years of experience or equivalent professional experience in lieu of a formal degree

• 10 years of progressive experience in back-end physical design and verification including significant leadership roles

• Deep expertise in hierarchical physical design strategies methodologies and advanced process node challenges

• In-depth understanding of current design technologies used in major foundries

• Strong understanding of ASIC design flow RTL integration synthesis and timing closure highly preferred

• In-depth knowledge of modern EDA tools and flows

• Preferred experience in automation and scripting using Makefile Tcl Python or Perl to enhance design efficiency and flow robustness

• Strong communication and collaboration skills with the ability to influence cross-functional teams and executive stakeholders

• Experience in developing and deploying advanced physical design methodologies and flows

• Strong knowledge preferred on static timing analysis (PrimeTime Tempus) EM/IR-Drop/crosstalk analysis (PTSI Voltus Redhawk PrimeRail) extraction (Quantus StarRC) formal or physical verification (Formality Verplex Calibre Hercules) a plus

• Familiarity with AI/ML-driven optimization in physical design tools is a plus

Expected Base Pay Range (USD)

156400 - 231440 $ per annum

The successful candidates starting base pay will be determined based on job-related skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional comprehensive benefits that support our employees at every stage - from internship to retirement and through lifes most important moments. Our offerings are built around four key pillars: financial well-being family support mental and physical health and recognition. Highlights include an employee stock purchase plan with a 2-year look back family support programs to help balance work and home life robust mental health resources to prioritize emotional well-being and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .

Interview Integrity

To support fair and authentic hiring practices candidates are not permitted to use AI tools (such as transcription apps real-time answer generators like ChatGPT or Copilot or automated note-taking bots) during interviews.

These tools must not be used to record assist with or enhance responses in any way. Our interviews are designed to evaluate your individual experience thought process and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations including the Export Administration Regulations (EAR). As such applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens lawful permanent residents or protected individuals as defined by 8 U.S.C. 1324b(a)(3) all applicants may be subject to an export license review process prior to employment.

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