Systems Engineering Intern Silicon PDK
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Job Location:
Santa Clara County, CA - USA
Monthly Salary:
Not Disclosed
Posted on:
13 hours ago
Vacancies:
1 Vacancy
Job Summary
Kilby Labs is seeking a highly motivated and experienced silicon photonics Process Design Kit (PDK) and Layout Engineering Intern to support the development of next-generation photonics design methodologies with a focus on schematic-driven layout for photonics integrated circuits (PIC) and optical-electrical PDK development.
The role will contribute to building a scalable automated design flows that bridge schematic capture layout generation and simulation / testbench infrastructure within a Cadence-based platform. This position offers hands-on exposure to advanced PIC design enablement and electronic-photonics co-design workflows with close collaboration with the silicon photonics designers RF designers and layout engineers.
Responsibilities may include but are not limited to:
- Assist in the development of schematic-driven layout flows for PIC including creating of symbols layout ports and connectivity.
- Translate schematic-level designs into layout and creat Parametric Cells using in SKILL scripting.
- Support design enablement and PDK development including building and maintaining a PDK and schematic-driven layout automation.
- Contribute to the definition and implementation of design rules and verification methodologies including design rule check (DRC) and layout versus schematic (LVS) checks for connectivity and netlist validation.
- Support optical-electrical co-design by linking photonic and RF blocks using Verilog-A behavior models and S-parameters for system-level simulation.
- Collaborate with cross-functional teams to validate flows through integrated simulation and testbench development
Qualifications
Minimum Requirements:
- Currently pursuing a PhD degree in Electrical Engineering Applied Physics Photonics or related field
- Strong hands-on experience with Cadence Virtuoso or other photonic design enablement tools for design enablement platforms.
- Fundamental understanding of photonics integrated circuits of passive and active components with experience in photonics design using tools such as Lumerical and HFSS.
Preferred Qualifications:
- Demonstrated experience contributing to successful tape-outs at leading foundries
- Familiarity with Electronic-Photonic Design Automation (EPDA) flows including co-simulating photonic circuits with CMOS driver/TIA circuits.
- Experience using Python-based layout frameworks to automate photonic layout routing.
- Experience in creating or modifying Parametric Cells with SKILL scripting.
Required Experience:
Intern
Key Skills
- Campaigns
- Abinitio
- AutoCAD 3D
- Hardware & Networking
- Customer Support
- Arabic
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