Application Engineer II Silicon Signoff and Verification
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Job Location:
Belo Horizonte - Brazil
Monthly Salary:
Not Disclosed
Posted on:
Yesterday
Vacancies:
1 Vacancy
Job Summary
At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence Design Systems Inc. is looking for a motivated Application Engineer II: Silicon Signoff and Verification candidate to work with us in Belo Horizonte Brazil.At Cadence we hire and develop leaders and innovators who want to impact the world of technology. Cadence has been nominated as a Great Place to Work globally and in Brazil and is also a Fortune 100 Best Companies to Work For. As a Senior Application Engineering - Silicon Signoff and Verification member you will be part of the Silicon Signoff and Verification (SSV) team.
The SSV team works with the Quantus Pegasus and Voltus platforms.
To understand more on what we do you can visit here.
Job Description:
- Helping customers to adopt and proliferate our IC Signoff solutions
- Conducting technical presentations technical training and product demonstrations including development of customized presentations
- Supporting technical evaluations and benchmarks
- Help R&D and product engineers develop competitive and creative technical solutions
Requirements:
- Complete Bachelors in Electrical Electronics System Engineering computer science or related areas
- MOS transistors Physical verification flows ( i.e.. DRC LVS & FILL) Parasitic extraction flows IR Drop/Electromigration tools Physical verificationrule writing.
- Excellent written and verbal communication skills
- Interest in learning new technologies
- Open to continued personal development to meet the evolving demands of the EDA industry
- Experience in scripting languages such as Tcl/Perl/Python is a must
- Team player with a positive attitude willingness to offer and execute ideas and solutions to enhance processes within an evolving environment
Nice to have:
- Industry Physical Design experience
- Prior experience with IC digital implementation flows and font-end EDA tools including Synthesis DFT and Logical Equivalence Checking
- Prior experience with Cadence tools such as Genus Innovus Conformal Tempus Modus Voltus or ICC ICC2 DC or Primetime is highly desired
- Experience with advanced nodes
Additional Job Details:
- Employment category: CLT
- Employment term: 40 hours/week.
- Competitive benefits.
- Location: Av Contorno 5800 Belo Horizonte Minas Gerais Brazil.
About Cadence Design Systems:
Cadence is the only company that provides the expertise and tools IP and hardware required for the entire electronics design chain from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live work and play. Our products are used in mobile consumer cloud datacenter automotive aerospace IoT industrial and other market segments. For more information access .
Were doing work that matters. Help us solve what others cant.
Required Experience:
IC
Key Skills
- Account Management
- Apache Web Server
- Jpa
- ABAP
- Community Support
- Islamic Banking
About Company
Do you want to shape the future of technology? Cadence is leading the charge to solve some of technology’s toughest challenges. We work with the world’s most innovative companies, across a growing range of industries. Major trends that you hear about everyday – like artificial intell ... View more
