Cadence Design Systems is looking for a highly motivated student to fill an internship on the RTL Compiler R&D engineering team (Front-End Design business unit). As an intern you will get to work with a variety of our staff and be responsible for designing and developing physical estimation and optimization software. Development responsibilities will include physical optimization engine development data-model enhancements and API/Class definition & enhancement.
Position Requirements:
The successful candidate for an internship will possess the following combination of education and experience:
MS in Computer Science or Electrical Engineering
Strong ability to learn
Knowledge of C/C
Strong analysis and problem solving skills
Excellent algorithmic skills
Experience with UNIX and/or LINUX platforms is preferred
Strong knowledge of Tcl is preferred
Excellent communication skill is required
The annual salary range for California is $28.60 to $53.12 an hour. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications skill level competencies and work location. Our benefits programs include: paid holidays and 401(k) plan with employer match.
Required Experience:
Intern
Do you want to shape the future of technology? Cadence is leading the charge to solve some of technology’s toughest challenges. We work with the world’s most innovative companies, across a growing range of industries. Major trends that you hear about everyday – like artificial intell ... View more