Specialist, Field-Programmable Gate Array Design Engineer

Salt Lake, UT - USA

Monthly Salary: Not Disclosed

Posted on: 4 hours ago

Vacancies: 1 Vacancy

Job Summary

Job Title: Specialist Field-Programmable Gate Array Design Engineer
Job Code: 33800
Job Location: Salt Lake City Utah
Job Schedule: 9/80 (Every other Friday off!)

Job Description:
L3Harris is seeking a skilled FPGA design engineer with a background in wireless digital communications modems networking and/or digital signal processing (DSP). We develop advanced wireless digital communication systems and electronic warfare systems. Our development efforts span the entire lifecycle including proposals requirement definition coding simulation synthesis place and route verification testing and system support. We are looking for an engineer who can effectively collaborate with a team of talented engineers as well as work independently. Salt Lake City offers incredible year-round outdoor recreation options and cultural experiences and L3Harris values your work/life balance so you can enjoy these opportunities.

Essential Functions:
Participate in the design and implementation of modulation demodulation digital filters and Forward Error Correction (FEC) for communication systems.
Assist in the development of electronic warfare and networking systems.
Work with industry-standard interfaces (e.g. 10/100/1000 Ethernet SPI UART SDRAM DDR3 JESD PCIe Ethernet).
Conduct FPGA verification through simulation and unit testing.
Work within a team to complete project tasks.
Must be able to obtain a US security clearance.

Qualifications:
Bachelors degree in Computer Science Computer Engineering Software Engineering Electrical Engineering or a related field. and 4 years of related experience.
Ability to obtain Secret security clearance

Preferred Additional Skills:
3 years FPGA design experience.
Experience in VHDL or Verilog development languages.
Familiarity with implementing modem and/or DSP circuits in programmable logic using FPGA devices.
Experience with simulation synthesis and placement software tools such as ModelSim Synplicity Xilinx Vivado / ISE and/or Altera Quartus development tool sets.
Basic understanding of timing closure in FPGAs.
Some experience in laboratory debug techniques using digital scopes logic analyzers BERTS and other measurement devices.
Knowledge of FPGA design using high-speed serial interfaces.
Familiarity with code revision management tools such as Git or Clearcase.
Basic programming knowledge in C/C/C# and Matlab/Simulink.
Active Secret Clearance

Required Experience:

Job Title: Specialist Field-Programmable Gate Array Design EngineerJob Code: 33800Job Location: Salt Lake City UtahJob Schedule: 9/80 (Every other Friday off!)Job Description:L3Harris is seeking a skilled FPGA design engineer with a background in wireless digital communications modems networking and...

Job Title: Specialist Field-Programmable Gate Array Design Engineer
Job Code: 33800
Job Location: Salt Lake City Utah
Job Schedule: 9/80 (Every other Friday off!)