Job Description:
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1. System Integration & Debugging
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Integrate PCIe NVMe and CXL-based subsystems across hardware firmware OS and tooling layers
-
Diagnose complex system issues including link instability performance bottlenecks protocol errors and interoperability challenges
-
Perform structured root-cause analysis using specifications logs traces and instrumentation
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2. Protocol & Architecture Expertise
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Apply working knowledge of:
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PCI Express (PCIe): LTSSM states link training equalization TLP/DLLP/FLIT behavior
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NVMe: Queue architecture command sets performance tuning error handling
-
CXL: Device types coherency models memory semantics interop considerations
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Reference and interpret official specifications errata and standards documentation
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3. Automation & Data Analysis
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Develop Python scripts and tools to:
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Automate log parsing and analysis
-
Analyze large datasets for performance stability and error patterns
-
Accelerate debug and validation workflows
-
Use data-driven approaches to validate hypotheses and demonstrate before/after impact
-
4. Documentation & Reporting
-
Produce clear structured documentation including debug reports analysis summaries and validation results
-
Use Excel Word PowerPoint and similar tools to create repeatable high-signal engineering artifacts
-
Improve documentation or processes that unblock teams and reduce recurring issues
-
5. Cross-Functional Collaboration
-
Communicate complex technical issues effectively to diverse audiences (engineering management cross-teams)
-
Collaborate openly ask questions and contribute to a constructive engineering culture
-
Support and unblock peers through knowledge sharing and clear documentation
Job Description: 1. System Integration & Debugging Integrate PCIe NVMe and CXL-based subsystems across hardware firmware OS and tooling layers Diagnose complex system issues including link instability performance bottlenecks protocol errors and interoperability challenges Perform structu...
Job Description:
-
1. System Integration & Debugging
-
Integrate PCIe NVMe and CXL-based subsystems across hardware firmware OS and tooling layers
-
Diagnose complex system issues including link instability performance bottlenecks protocol errors and interoperability challenges
-
Perform structured root-cause analysis using specifications logs traces and instrumentation
-
2. Protocol & Architecture Expertise
-
Apply working knowledge of:
-
PCI Express (PCIe): LTSSM states link training equalization TLP/DLLP/FLIT behavior
-
NVMe: Queue architecture command sets performance tuning error handling
-
CXL: Device types coherency models memory semantics interop considerations
-
Reference and interpret official specifications errata and standards documentation
-
3. Automation & Data Analysis
-
Develop Python scripts and tools to:
-
Automate log parsing and analysis
-
Analyze large datasets for performance stability and error patterns
-
Accelerate debug and validation workflows
-
Use data-driven approaches to validate hypotheses and demonstrate before/after impact
-
4. Documentation & Reporting
-
Produce clear structured documentation including debug reports analysis summaries and validation results
-
Use Excel Word PowerPoint and similar tools to create repeatable high-signal engineering artifacts
-
Improve documentation or processes that unblock teams and reduce recurring issues
-
5. Cross-Functional Collaboration
-
Communicate complex technical issues effectively to diverse audiences (engineering management cross-teams)
-
Collaborate openly ask questions and contribute to a constructive engineering culture
-
Support and unblock peers through knowledge sharing and clear documentation
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