SoC RTL Design Engineer (Senior & Lead)
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Job Location:
Monthly Salary:
Posted on:
10 hours ago
Vacancies:
1 Vacancy
Job Summary
Location: UK & European Union (Hybrid / Onsite as per project needs)
Employment Type: 12 months Contract
Industry: Semiconductor / Silicon Design
Customer: Leading Semiconductor Company
About the Role
We are hiring Senior and Lead SoC Design Engineers to work on next-generation SoCs based on high-end ARM architectures.
This role focuses on RTL design SoC integration and high-speed IP integration for advanced silicon platforms.
Key Responsibilities
Design and integrate ARM-based SoC subsystems at RTL level
Integrate high-speed IPs including PCIe (Gen5/Gen6) DDR4/DDR5 Ethernet
Work with AMBA protocols: AXI AHB APB CHI
Perform chip-level integration including IO clocks resets and power domains
Run and review static checks (CDC RDC Lint Low Power checks)
Collaborate with architecture verification validation and physical design teams
For Lead roles:
Drive SoC execution strategy
Guide and review team deliverables
Translate architecture specs into RTL implementation
Required Skills & Experience
510 years (Senior) / 10 years (Lead) in SoC RTL design
Strong experience with ARM-based SoC architectures
Hands-on experience with AMBA protocols (AXI AHB APB CHI)
Proven experience integrating PCIe DDR Ethernet IPs
Strong knowledge of RTL design using Verilog / SystemVerilog
Experience with CDC RDC linting and static design checks
Familiarity with Git-based version control
Desirable Skills
Experience with PCIe Gen5 / Gen6
Knowledge of Die-to-Die interconnects
Exposure to multi-die / chiplet-based SoCs
Prior leadership or technical ownership experience (Lead role)
Key Skills
- Aerospace Engineering
- Anti Money Laundering
- Electrical Installation
- Desktop Support
- Corporate Marketing
- Fabrication
