At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology.
Responsibilities:
- Part of the team that takes state-of-the-art Cadence Palladium system chips from emulation/bringup to production
- Working on chip design verification emulation and Post Silicon Validation;
- Support the system software team for integration of chip specific routines;
- Working through ATE test time optimizations before chips go to production; and
- Supporting board team to review schematics and providing chip routines for characterization.
Requirements
Currently enrolled in MS/BS in Electrical Engineering Computer Engineering or a similar major.
Experience withASIC / RTL / HW Development
Interest and knowledge of verif / post silicon bringup
The annual salary range for California is $88900 to $165100. You may also be eligible to receive incentive compensation: bonus equity and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications skill level competencies and work location. Our benefits programs include: paid vacation and paid holidays 401(k) plan with employer match employee stock purchase plan a variety of medical dental and vision plan options and more.
Were doing work that matters. Help us solve what others cant.
Required Experience:
IC
At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology.Responsibilities:Part of the team that takes state-of-the-art Cadence Palladium system chips from emulation/bringup to productionWorking on chip design verification emulation and Post Silicon ...
At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology.
Responsibilities:
- Part of the team that takes state-of-the-art Cadence Palladium system chips from emulation/bringup to production
- Working on chip design verification emulation and Post Silicon Validation;
- Support the system software team for integration of chip specific routines;
- Working through ATE test time optimizations before chips go to production; and
- Supporting board team to review schematics and providing chip routines for characterization.
Requirements
Currently enrolled in MS/BS in Electrical Engineering Computer Engineering or a similar major.
Experience withASIC / RTL / HW Development
Interest and knowledge of verif / post silicon bringup
The annual salary range for California is $88900 to $165100. You may also be eligible to receive incentive compensation: bonus equity and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications skill level competencies and work location. Our benefits programs include: paid vacation and paid holidays 401(k) plan with employer match employee stock purchase plan a variety of medical dental and vision plan options and more.
Were doing work that matters. Help us solve what others cant.
Required Experience:
IC
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