TestbenchVerification Engineer

Boxborough, MA - USA

Monthly Salary: Not Disclosed

Posted on: 3 days ago

Vacancies: 1 Vacancy

Job Summary

Overview:

TekWissen is a global workforce management provider headquartered in Ann Arbor Michigan that offers strategic talent solutions to our clients world-wide. This Client is an American multinational semiconductor company based in Santa Clara California that develops computer processors and related technologies for business and consumer markets. global company that specializes in manufacturing semiconductor devices used in computer processing. The company also produces flash memories graphics processors motherboard chip sets and a variety of components used in consumer electronics goods.

Job Title: Testbench/Verification Engineer

Work Location: Santa Clara/ Boxborough (MA)/ Austin (TX)

Duration: 6 Months

Work Type: Temporary Assignment

Job Type: Onsite

Job Description:

The Role:

Testbench/Verification Engineer for the Infinity Fabric team.
The Fabric IP is a flexible and scalable high-performance coherent interconnect used in multiple product lines

The Person:

We are seeking an experienced testbench and verification engineer with exceptional programming skills System Verilog and UVM experience proven experience with working in complex testbench environments and knowledge of the design verification cycles.
Attention to detail staying organized tracking work to completion excellent communication analytical problem-solving skills and connecting the dots in new initiatives are additional must-have skills.
Experience in performance verification performance debug and any kind of modeling is a highly valued plus.
The engineer is expected to be comfortable working across geographies and timezones to collaborate with multiple teams as needed.

Key Responsibilities:

Develop refactor and enhance UVM-based testbenches to verify or accelerate the simulation of complex designs at component or subsystem level.
Work closely with other verification engineers designers architects and performance engineers to understand and enhance the behavior of the testbench or related models.
Perform tasks related to regression testing debug and integration of any changes into the main codebase. Ensure optimal behavior of the testbench within the context of the block chip and overall system.
Execute test plans for constrained-random and directed tests new checks and functional coverage
Provide technical guidance and innovative ideas to improve quality processes and productivity

Preferred Experience:

Proficient in verification and testbench flows especially seeking deep understanding and hands-on experience in System Verilog and UVM frameworks and testbenches processes and flows.
Proficient in debugging testbench and RTL code using simulation tools.
Proficient in the use of Linux-based tools and scripting in Perl Python and Ruby.
Automating workflows in a distributed compute environment.
Experience in approaches to simulation profile efficiency improvement acceleration.
Development of reusable and maintainable code using software engineering best practices.
Performance analysis performance debug and modeling exposure are highly valued.
Good working knowledge of SystemC and TLM with some related experience.
Scripting language experience; Perl Python Ruby Makefile

TOP 3-5 MUST HAVE SKILLS:

Verification testbench flows System Verilog UVM
Experience with performance analysis performance optimization performance debug
Scripting language (Perl Python Ruby
Proven experience in debugging the test-bench VIP RTL code

NICE TO HAVE:

Familiarity with the Fabric NOC solutions is a bonus

TekWissen Group is an equal opportunity employer supporting workforce diversity.

Overview: TekWissen is a global workforce management provider headquartered in Ann Arbor Michigan that offers strategic talent solutions to our clients world-wide. This Client is an American multinational semiconductor company based in Santa Clara California that develops computer processors...