Principal FPGA RTL Design Engineer Signal Processing

Company Overview

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Department Overview

Job Description

THE OPPORTUNITY

Silvus is seeking a Principal FPGA / RTL Design Engineer- Signal Processing who will report to the Senior Engineering Director in Irvine and work closely with the FPGA Engineering team. The successful individual in this role will participate in all aspects of the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus MIMO wireless networking addition they participate in the support and development of FPGA-based designs for our advanced wireless systems R&D. These are exciting projects aimed at addressing challenging real-world communication needs.

This position is on a hybrid schedule a minimum of 4 days onsite per week is expected. On-site days are Monday through Thursday. The location for this role is Silvus Technologies Engineering and R&D Office in Irvine CA near the vibrant Irvine Spectrum.

The following is a list of at least some of the current essential job functions of the position. Management may assign or reassign duties and responsibilities at any time at its discretion.

ROLE AND RESPONSIBILITIES

• Working with system engineers and digital design architecting for wireless communication projects including fixed point design of signal processing blocks.
• RTL coding simulation and test bench development.
• FPGA synthesis and timing closure.
• Hardware verification and troubleshooting; familiarity with logic analyzers.
• Provide support to the RF and Software Engineering teams.

REQUIRED QUALIFICATIONS

• Bachelor of Science degree in Electrical Engineering Computer Science or related fields.
• Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; 8 years of experience in RTL design and FPGA implementation with an advanced degree (MS or PhD) in Electrical Engineering Computer Science or related fields.
• Demonstrated experience with fixed point binary arithmetic and digital signal processing (DSP) designs.
• Deep knowledge of RTL design fundamentals using Verilog and System-Verilog.
• Proven expertise working with front-end RTL design tools FPGA synthesis timing closure multiple clock-domain and/or high-utilization FPGA designs.
• Experience with Xilinx FPGAs SoCs and the Vivado IDE
• Must be a U.S. Citizen due to clients under U.S. government contracts.
• All employment is contingent upon the successful clearance of a background check.

PREFERRED KNOWLEDGE SKILLS AND ABILITIES

• M.S. or Ph.D. degree in Electrical Engineering Computer Science or relevant fields.
• Basic MATLAB skills.
• Solid knowledge and understanding of scripting languages such as Perl and Python.
• Strong communication and presentation skills.
• Experience with wireless communication systems on FPGA or ASIC designs.

COMPENSATION: $165000 - $250000 / annually

This pay range is NOT a guarantee is based on market research and peer data and will vary depending on the candidates experience and qualifications.

Basic Requirements

• Bachelor of Science degree in Electrical Engineering Computer Science or related fields.
• Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; 8 years of experience in RTL design and FPGA implementation with an advanced degree (MS or PhD) in Electrical Engineering Computer Science or related fields.
• Demonstrated experience with fixed point binary arithmetic and digital signal processing (DSP) designs.
• Deep knowledge of RTL design fundamentals using Verilog and System-Verilog.
• Proven expertise working with front-end RTL design tools FPGA synthesis timing closure multiple clock-domain and/or high-utilization FPGA designs.
• Experience with Xilinx FPGAs SoCs and the Vivado IDE
• Must be a U.S. Citizen due to clients under U.S. government contracts.

Travel Requirements

Relocation Provided

Position Type

Referral Payment Plan

Our :

• Incentive Bonus Plans

• Medical Dental Visionbenefits

• 401K with Company Match

• 10 Paid Holidays

• GenerousPaidTime Off Packages

• Employee Stock Purchase Plan

• PaidParental & Family Leave

• and more!

EEO Statement

Motorola Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race color religion or belief sex sexual orientation gender identity national origin disability veteran status or any other legally-protected characteristic.

We are proud of our people-first and community-focused culture empowering every Motorolan to be their most authentic self and to do their best work to deliver on the promise of a safer world. If youd like to join our team but feel that you dont quite meet all of the preferred skills wed still love to hear why you think youd be a great addition to our team.

Were committed to providing an inclusive and accessible recruiting experience for candidates with disabilities or other physical or mental health conditions. To request an accommodation please complete thisReasonable Accommodations Formso we can assist you.