Category
Scope
Two students Master Thesis (30 hp)
Background
In modern communication systems many manufacturers rely on proprietary synchronization methods in their communication links. Among these Zadoff-Chu (ZC) sequences are widely adopted due to their ideal correlation properties allowing precise timing acquisition even in dynamic conditions 1. However unlike standardized wireless systems (e.g. LTE) vendors often implement non-standard protocols tailored to their hardware.
For a detection system (which may not know the specifics of the communication protocol) timing detection and root value identification must be performed directly on these customized waveforms introducing significant computational challengesparticularly for low-power embedded systems.
To address this hardware-accelerated algorithms are needed to maintain synchronization performance while operating under strict compute and power constraints.
Problem Description
This thesis focuses on developing efficient algorithms for detecting ZC sequences in communication systems with a focus on low-power and low-compute environments. The student(s) will explore methods such as:
All this while balancing detection accuracy signal quality and computational efficiency.
Goal
The main objective is to achieve reliable detection with minimal computational effort ensuring good performance on embedded hardware. As part of this work the student(s) will have the opportunity to design and test a prototype using an FPGA development board allowing real-world validation of the proposed algorithms.
References
1Andrews Jeffrey G. A primer on zadoff chu preprint arXiv:(2022).
2 Lyon Douglas. The Discrete Fourier Transform part 6: Cross-correlation. J. Object Technol. 9.2 (2010): 17-22.
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