Job Description -
Hands-on experience with multiple MIPI variants like DSI CSI-2 or UniPro
Exposure to low-power verification UPF flow or power-aware simulations
Familiarity with mixed-signal verification or AMS co-simulation
Comfort with Python/Perl for automation and debug efficiency
Experience working on high-speed protocols such as PCIe USB or DDR
Background in gate-level simulations and timing-related debug
Knowledge of formal techniques or assertion-based verification
Experience with coverage modeling for complex SoC subsystems
Understanding of performance tuning and regression optimization
Prior work in an environment where design and DV teams collaborate tightly
Job Description - Hands-on experience with multiple MIPI variants like DSI CSI-2 or UniPro Exposure to low-power verification UPF flow or power-aware simulations Familiarity with mixed-signal verification or AMS co-simulation Comfort with Python/Perl for automation and debug ef...
Job Description -
Hands-on experience with multiple MIPI variants like DSI CSI-2 or UniPro
Exposure to low-power verification UPF flow or power-aware simulations
Familiarity with mixed-signal verification or AMS co-simulation
Comfort with Python/Perl for automation and debug efficiency
Experience working on high-speed protocols such as PCIe USB or DDR
Background in gate-level simulations and timing-related debug
Knowledge of formal techniques or assertion-based verification
Experience with coverage modeling for complex SoC subsystems
Understanding of performance tuning and regression optimization
Prior work in an environment where design and DV teams collaborate tightly
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