Package Design Engineer

J Lee Engineering

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profile Job Location:

Charlotte, VT - USA

profile Monthly Salary: Not Disclosed
Posted on: 5 hours ago
Vacancies: 1 Vacancy

Job Summary

Job Summary

As a Package Design Engineer you will be responsible for the design simulation and optimization of sophisticated packaging methods for high-performance electronics. You will work with cross-functional teams to guarantee that our products meet reliability thermal and electrical performance standards while driving innovation in semiconductor packaging. This role provides an excellent opportunity to work on next-generation technologies in a fast-paced collaborative setting.

Key Responsibilities

- Use tools like Cadence Ansys or Siemens EDA to design and create integrated circuit packaging solutions such as substrate layouts interconnects and thermal management systems.

- Validate package designs by simulating signal integrity power supply and thermomechanical stress.

- Work with the R&D manufacturing and testing teams to prototype and iterate package architectures.

- Analyze failure modes and make recommendations to increase yield and dependability.

- Keep up with industry trends in advanced packaging (e.g. 2.5D/3D integration fan-out wafer-level packaging) and incorporate them into projects.

- Document designs generate technical reports and assist with patent filings as needed.

- Ensure compliance with industry standards (such as JEDEC) and environmental legislation.

Skills

- Experience with EDA tools for package design (e.g. Allegro SiP Layout) and simulation software (e.g. HFSS PowerSI).

- A thorough understanding of electrical thermal and mechanical principles in packaging.

- Knowledge of materials science including substrates underfills and encapsulants.

- Outstanding problem-solving and analytical abilities.

- Excellent communication abilities for explaining complicated technological concepts to non-experts.

- Experience with scripting (Python MATLAB) for automation is advantageous.

- Ability to work in a team-oriented deadline-driven environment.

Education & Experience

- A bachelors degree in electrical engineering materials science or a related discipline (a masters or PhD is desirable).

- Three or more years of hands-on experience in IC package design preferably in semiconductor or electronics production.

- Proven experience with innovative packaging technologies in a professional or academic setting.

- Work permission in the United States is required; there is no visa sponsorship.

Annual Pay

The base income ranges from $120000 to $160000 depending on experience location and credentials. This range illustrates our commitment to providing competitive compensation for outstanding individuals in the United States.

Compensation & Benefits

- *Performance Bonus:* Up to 15% of base salary subject on individual and corporate goals.

- *Equity:* Stock options or RSUs to contribute to our success.

- *Health Benefits:* Medical dental and vision coverage begins on day one with employer contributions.

- *Retirement:* 401(k) matches up to 6% of your earnings.

- *Paid Time Off:* Includes 20 days of PTO 10 paid holidays and flexible sick leave.

- *Professional Development* includes tuition reimbursement conference attendance and ongoing training.

- *Work-Life Balance:* Hybrid/remote choices (for United States residents) wellness programs and parental leave.

- Other perks include gym membership reimbursement commuter benefits and employee help programs.

Job Summary As a Package Design Engineer you will be responsible for the design simulation and optimization of sophisticated packaging methods for high-performance electronics. You will work with cross-functional teams to guarantee that our products meet reliability thermal and electrical performanc...
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Key Skills

  • Load & Unload
  • Ruby
  • Shipping & Receiving
  • Forklift
  • Lift Truck Experience
  • Basic Math
  • Packaging
  • Warehouse Experience
  • Delivery Driver Experience
  • Heavy Lifting
  • Human Resources
  • RF Scanner