Staff DFT Engineer

San Jose, CA - USA

Monthly Salary: $ 141300 - 226000

Posted on: 30+ days ago

Vacancies: 1 Vacancy

Job Summary

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Job Description:

Broadcoms CSG division is seeking candidates for a Staff DFT engineer position. The successful candidate will be responsible for developing and implementing DFx (Design for Test/debug & manufacturability) solutions for Digital mixed signal IPs. Candidate will also drive/push state of the art in the areas of testability debug to enable low DPPM DFx solutions while optimizing the cost for test.

Responsibilities

Own IP DFT architecture implementation verification signoff STA constraints for DFT
Optimize DFT architecture for test cost test power and physical design constraints
Deliver optimal retargetable ATPG patterns for usage across business units
Collaborate with front-end and backend engineers to implement optimal DFx solutions
Support chip teams on IP DFT integration pattern verification and ATE bring-up
Participate in silicon bring-up characterization and yield recovery

Requirements

Knowledge of Testability techniques and features (SCAN Built-in-Self-Tests boundary scan.) covering digital logic embedded memories and Serdes PHY/IOs
Scan architectural trade-off coverage analysis ATPG pattern generation and verification
Experience in implementation of MBIST for memories and knowledge of repair schemes algorithms
Well versed in JTAG standards (1149.1 and 1149.6 1687) and boundary scan
Strong Pre/Post Silicon debugging analytical and independent problem solving ability
Strong knowledge of digital design and logical equivalence checking
Experience with Gate level simulations and debug with industry simulator tools
Experience in developing STA constraints for DFT logic/modes and working knowledge of primetime
Post silicon experience on pattern bring-up debug and silicon characterization etc
Working knowledge of TCL perl and shell scripting
Hands on experience with Mentor/Siemens DFT Tessent tool suite for DFT insertion is desirable
Working knowledge of SERDES Analog /mixed-signal DFT solutions (like IOBIST AC boundary scan) is a plus
Must be a team player with good verbal and written communication skills.
Must be a self-driven engineer with good planning and organizing skills to deliver high quality output in a timely manner.
Experience : Bachelors in Electrical or Computer Science Engineering required with a minimum of 8 years of relevant industry experience or a Masters Degree with a minimum of 6 years of relevant industry experience

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $141300- $226000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical dental and vision plans 401(K) participation including company matching Employee Stock Purchase Program (ESPP) Employee Assistance Program (EAP) company paid holidays paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race color creed religion sex sexual orientation national origin citizenship disability status medical condition pregnancy protected veteran status or any other characteristic protected by federal state or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA please be sure to fill out a home address as this will be used for future correspondence.

Required Experience:

Staff IC

Please Note:1. If you are a first time user please create your candidatelogin account before you apply for a job. (Click Sign In > Create Account)2. If you already have a Candidate Account please Sign-In before you apply.Job Description:Broadcoms CSG division is seeking candidates for a Staff DFT en...

Please Note:

1. If you are a first time user please create your candidatelogin account before you apply for a job. (Click Sign In > Create Account)

2. If you already have a Candidate Account please Sign-In before you apply.

Job Description:

Responsibilities

Own IP DFT architecture implementation verification signoff STA constraints for DFT
Optimize DFT architecture for test cost test power and physical design constraints
Deliver optimal retargetable ATPG patterns for usage across business units
Collaborate with front-end and backend engineers to implement optimal DFx solutions
Support chip teams on IP DFT integration pattern verification and ATE bring-up
Participate in silicon bring-up characterization and yield recovery

Requirements

Knowledge of Testability techniques and features (SCAN Built-in-Self-Tests boundary scan.) covering digital logic embedded memories and Serdes PHY/IOs
Scan architectural trade-off coverage analysis ATPG pattern generation and verification
Experience in implementation of MBIST for memories and knowledge of repair schemes algorithms
Well versed in JTAG standards (1149.1 and 1149.6 1687) and boundary scan
Strong Pre/Post Silicon debugging analytical and independent problem solving ability
Strong knowledge of digital design and logical equivalence checking
Experience with Gate level simulations and debug with industry simulator tools
Experience in developing STA constraints for DFT logic/modes and working knowledge of primetime
Post silicon experience on pattern bring-up debug and silicon characterization etc
Working knowledge of TCL perl and shell scripting
Hands on experience with Mentor/Siemens DFT Tessent tool suite for DFT insertion is desirable
Working knowledge of SERDES Analog /mixed-signal DFT solutions (like IOBIST AC boundary scan) is a plus
Must be a team player with good verbal and written communication skills.
Must be a self-driven engineer with good planning and organizing skills to deliver high quality output in a timely manner.
Experience : Bachelors in Electrical or Computer Science Engineering required with a minimum of 8 years of relevant industry experience or a Masters Degree with a minimum of 6 years of relevant industry experience

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $141300- $226000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents and equity in accordance with equity plan documents and equity award agreements.

If you are located outside USA please be sure to fill out a home address as this will be used for future correspondence.

Required Experience:

Staff IC

Key Skills

Computer Science
Docker
Kubernetes
Python
VMware
C/C++
Go
System Architecture
gRPC
OS Kernels
Perl
Distributed Systems

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About Company

Broadcom

Broadcom Inc. is a global technology leader that designs, develops and supplies a broad range of semiconductor, enterprise software and security solutions.

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