Senior ASIC Verification Engineer

About Us:
Headquartered in Ottawa BTA Design serves the electronic design community in Canada and beyond specializing in ASIC and FPGA design and verification and embedded software development services. We augment and enhance our clients teams and accelerate the development of complete designs.

Were adaptable and efficient with a brilliant staff at our core. We aim to be the best at what we do.

Our success continues to fuel growth. We are currently searching for a number of key technical resources including a Senior ASIC Verification Engineer with expertise in UVM and PCIe. This is a new position and can be a remote position for the right candidate.

Position Overview
In this role the ideal candidate will work with a highly experienced team of verification professionals performing constrained-random functional-coveragebased verification using SystemVerilog and UVM. You will work from spec to coverage-closed verified and debugged designs developing environments integrating and leveraging 3rd-party VIP and ensuring robust verification of complex high-speed interface and networking blocks. You will verify blocks subsystems or top-level functionality within large and extremely complex networking-centric or HPC/AI SoCs built on advanced technology nodes down to 3nm FinFET. You will collaborate closely with strong deeply experienced design leads in world-class ASIC environments across BTAs client base.

Key Responsibilities:

• Join a team verifying blocks subsystems or entire chipswith an emphasis on high-speed interfaces and networking IP.
• Support the verification lead on project planning and management of front-end development activities.
• Develop test and coverage plans as well as verification environment architectures using SystemVerilog and UVM.
• Capture test coverage points and write targeted and constrained-random test cases.
• Employ constrained-random verification approaches and assertion-based verification where appropriate.
• Support silicon and lab bring-up with directed tests especially for high-speed interface validation.
• Perform and analyze both code and functional coverage to drive closure.

• 8 years of experience in ASIC verification.
• Deep expertise in Verilog SystemVerilog and scripting languages.
• Proven experience with the responsibilities listed above.
• Significant experience with OVM/UVM methodologies.
• Experience developing test and coverage plans from scratch.
• Experience architecting and developing multiple SV/UVM verification environments both from scratch and through re-use would be ideal.
• Strong expertise in constrained-random verification techniques assertions and functional coverage.
• Demonstrated experience verifying high-speed interfaces and networking protocols such as SERDES and other high-speed PHYs PCIe Ethernet OTN SONET InfiniBand or similar high-bandwidth interconnects. Experience with video processing GPUs or AI is an additional asset.
• Team-oriented with excellent interpersonal and communication skills.

Compensation:
$120000 to $170000 plus company bonus and benefits plan.
Salary is heavily dependent on individual experience and capability.

Only candidates selected for an interview will be Intelligence tools are not used in the evaluation and selection of candidates.

Why Work Here
We offer interesting work in challenging stimulating technical environments with companies that lead the world in technology and innovation.

We recognize that our strength is in the individuals who join our team so at BTA Design Services we foster an environment where everyone is appreciated trusted and engaged. We recognize that work-life balance is important and we strive to provide our employees with challenging roles that also allow them to enjoy family friends and life outside of work.