Senior Design Verification Engineer Duration: 12 months Hourly: W2 / 1099 / Corp-to-Corp Locations: Remote from any US location US Citizen or US Permanent Resident only
Required Experience: Subsystem verification SystemVerilog UVM Updating/debugging testbenches Integrated VIP/IPs (a plus) C-based testbenches (a plus) Scripting (a plus) Good problem-solving skills Good communication skills
Senior Design Verification EngineerDuration: 12 monthsHourly: W2 / 1099 / Corp-to-CorpLocations: Remote from any US locationUS Citizen or US Permanent Resident onlyRequired Experience: Subsystem verification SystemVerilog UVM Updating/debugging testbenches Integrated VIP/IPs (a plus) C-based testben...
Senior Design Verification Engineer Duration: 12 months Hourly: W2 / 1099 / Corp-to-Corp Locations: Remote from any US location US Citizen or US Permanent Resident only
Required Experience: Subsystem verification SystemVerilog UVM Updating/debugging testbenches Integrated VIP/IPs (a plus) C-based testbenches (a plus) Scripting (a plus) Good problem-solving skills Good communication skills