About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.
This is an existing vacancy.
Your Team Your Impact
The Optical Digital Signal Processing (ODSP) PHY SW Team works on Marvells products used in optical communication links. These chips form the backbone of the internet moving data within data centers between data centers between cities and even continents over high bandwidth optical fibres. SW team owns all the SW components for the chips including embedded FW customer SDK lab scripts and GUI applications to interface with the chips. This team is a critical part of the product development flow from initial lab bring-up to field deployment and is the go-to group for getting things done whether in the field or the lab.What You Can Expect
The core responsibilities for the Software team include:
Embedded FW that runs on our RISC-V-based multi-core MCU which controls our proprietary DSP data path.
C SDK provided to customers for interfacing and controlling our product.
Python-based GUI for in-field debug status and control.
Build test and automated regression infrastructure for the above.
However the Software team is a key enabler for bringing a product to production and the roll of a Software Engineer (Staff/Sr. Staff) is to work with Software/Hardware/Test teams to make that product launch a success. We work with a large and diverse cross-functional team including experts from hardware systems test customer support and operations.
In this position you will be:
Developing in C and Python.
The software expert on a block or portion of the design working with the rest of the team to integrate test and deliver the feature to customers.
Responsible for the Software Architecture Design Development and Testing of embedded C firmware for this block.
Taking lead on difficult to debug issues drive to root causes with Hardware/Systems teams and follow up with test/validation/customer support teams to make sure the issue is resolved.
Working with the cross-functional team to plan software milestones develop in sprints closing tickets work with multiple test disciplines squash all the bugs and roll out features for the product as a whole.
Traveling to offices worldwide for product development and chip bring-up (3weeks/yr Ottawa California Italy Vietnam).
Some possible tasks will be:
Training an intern or new hire when they first start to give them a leg up and help integrate into the team.
Develop python test scripts to configure control and get status from multiple DSP HW platforms for improving firmware stability.
Breaking-up and optimizing subroutines to make the best use of a multi-core MCU architecture.
Generating documentation examples user guides and demonstrating how to use a complicated feature to the customer support teams.
Helping teammates to review code analyze test results and spitball ideas for how to debug a complicated customer issue.
Implement a new temperature tracking algorithm for a DSP/analog control to improve performance when device temperature changes.
What Were Looking For
BS/MS degree in Computer Science Electrical/Software Engineering or related technical field(s).
5 years of experience in memory constrained embedded C/C FW development.
Experience with technical ownership on embedded projects; task management release planning architecture design development code reviews testing all the way through to customer volume production.
Understanding of embedded SoC micro-controller architecture (RISC-V architecture a plus) memory-mapped hardware interfaces GPIOs ISRs etc.
Excellent verbal and written communication skills in English and able to collaborate in a large cross functional organization
Excellent problem-solving and customer debug skills on real hardware in the lab.
Experience with using revision control and defect tracking systems (git & Jira or similar).
Preferred but not required:
Experience with SERDES IM-DD/Coherent DSP Ethernet/PCIe PHYs and/or Optical Module SW.
Experience with designing/developing/debugging software state machines transitions context saving error handling.
Experience with mixed-signal (analogdigital) control and monitoring PID/feedback loop control etc.
Experience with bare-metal RTOS device driver Linux kernel etc.
Familiarity with advanced compiler options and details (clang/gcc preferred).
Proficient in C and Python with knowledge of git Linux makefiles gdb IDEs bash etc.
Familiarity with digital verification test flows FPGA emulation hardware languages such as Verilog
Familiarity with lab equipment such as oscilloscopes supplies PNAs ONTs etc.
Understanding of Ethernet networking from the OSI model with emphasis on the PHY up to the data link level.
Familiarity with forward error correction PCS framing PMA/PMD PRBS and other PHY traffic schemes.
Understanding of signal processing: histograms BER SNR sampling phase Shannon limit impulse & frequency response FFT etc.
Expected Base Pay Range (CAD)
125000 - 166600 $ per annumAdditional Compensation and Benefit Elements
With competitive compensation and great benefits you will enjoy our workstyle within an environment of shared collaboration transparency and inclusivity. Were dedicated to giving our people the tools and resources they need to succeed in doing work that matters and to grow and develop with us. For additional information on what its like to work at Marvell visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices candidates are not permitted to use AI tools (such as transcription apps real-time answer generators like ChatGPT or Copilot or automated note-taking bots) during interviews.
These tools must not be used to record assist with or enhance responses in any way. Our interviews are designed to evaluate your individual experience thought process and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations including the Export Administration Regulations (EAR). As such applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens lawful permanent residents or protected individuals as defined by 8 U.S.C. 1324b(a)(3) all applicants may be subject to an export license review process prior to employment.
Marvell may employ artificial intelligence technologies to assist in the evaluation of job applications. All application reviews include meaningful human involvement and no hiring decisions are made solely on the basis of automated processing.
#LI-AB1Required Experience:
Senior IC
Designed for your current needs and future ambitions, Marvell delivers the data infrastructure technology transforming tomorrow’s enterprise, cloud, automotive, and carrier architectures for the better.