Senior Staff Analog Design Engineer

About Marvell

Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI automotive and carrier architectures our innovative technology is enabling new possibilities.

At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.

Your Team Your Impact

What You Can Expect

• Responsible for designing highly sophisticated CMOS transceivers SERDES Die2Die interface and essential analog IPs for AI Datacenter and Automotive applications.
• You will play a critical role in architectural investigations implementing key circuits such as transmitters receivers analog front end DFE PLL DLL regulators CDRs and more ensuring they meet stringent performance targets.
• Responsible for design and verification of a complex analog block work with other analog design engineers interface with layout verification and application teams.
• Implement complex analog circuits for high-speed SerDes and other IPs by understanding specs and translating them to circuits.
• Design optimize and verify critical circuits (PLL DLL ADC regulators TX RX CDRs) to meet performance targets.
• Collaborate with cross-functional teams including architecture layout digital verification and silicon bring-up/validation teams from design till product integration.
• Drive design reviews to ensure highly reliable automotive IP development.
• Provide guidance and mentorship to junior analog design engineers.
• Ensure adherence to robust methodologies and design practices. Document design details and comply with best practices.
• Always do the right thing and represent Marvell with ethics and integrity.

What Were Looking For

• Bachelors/Masters/PhD in Electrical Engineering or a related field with 6years of experience in analog IC design for high-speed SerDes and transceivers
• Expertise in designing any of Tx Rx CDR PLL DLL ADC regulators.
• Strong understanding of analog IC design principles and methodologies. Proven track record in delivering analog IPs.
• Proficiency in using Cadence Virtuoso Spectre HSPICE MATLAB and other industry-standard tools for design and verification.
• Silicon debug and interfacing with validation teams
• A thorough understanding of the physical layout requirement and ability to perform the critical layouts.
• Excellent communication and collaboration abilities.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits you will enjoy our workstyle within an environment of shared collaboration transparency and inclusivity. Were dedicated to giving our people the tools and resources they need to succeed in doing work that matters and to grow and develop with us. For additional information on what its like to work at Marvell visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.

Interview Integrity

As part of our commitment to fair and authentic hiring practices we ask that candidates do not use AI tools (e.g. transcription apps real-time answer generators like ChatGPT CoPilot or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience thought process and communication skills in real-time. If a candidate uses such tools during an interview they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations including the Export Administration Regulations (EAR). As such applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens lawful permanent residents or protected individuals as defined by 8 U.S.C. 1324b(a)(3) all applicants may be subject to an export license review process prior to employment.