Location Bangalore AMD
Experience : 3-5 Years
- Understanding of low power design features and optimization techniques including static and dynamic power saving schemes around architecture design and power management.
- Ability to balance trade-offs between power performance and area
- Verilog or System Verilog experience and fundamental RTL design skills.
- Experience using tools for power analysis power delivery and signoff. (e.g. PrimePower PowerArtist PP-RTL)
- Knowledge of ASIC Physical Design flow from RTL through Synthesis Place & Route.
Good to have :
- Background in running simulation and emulation tools VCS Palladium Zebu
- Knowledge around graphics benchmarks/workload analysis.
"low power",rtl coding,synthesis,"power analysis","system verilog"