Principal Engineer-Design (Signal and Power Integrity)
Principal Engineer-Design (Signal and Power Integrity)
Employer Active
Job Alert
You will be updated with latest job alerts via email
Share
Job Alert
You will be updated with latest job alerts via email
Not Disclosed
Salary Not Disclosed
1 Vacancy
Job Description
Are you looking for a unique opportunity to be a part of something great Want to join a 17000-member team that works on the technology that powers the world around us Looking for an atmosphere of trust empowerment respect diversity and communication How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization We offer all that and more at Microchip Technology Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchips nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development values-based decision making and strong sense of community driven by our Vision Mission and 11 Guiding Values; we affectionately refer to it as the Aggregate System and its won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description:
Microchip Technology Inc. has a Principal Engineer-Design (Signal and Power Integrity) opening based in Austin TX. The successful candidate will be responsible for developing and driving Signal and Power Integrity methodologies for high-speed FPGA products. You will be working with other SIPI engineers and working with a global cross functional team to provide solutions at a system level for internal and external customers.
Responsibilities:
Collaborate effectively within a global team environment demonstrating excellent communication skills (verbal and written).
Possess robust analytical and debugging capabilities for high-speed Signal Integrity and Power Integrity (SIPI) analysis across Die Package and Boards.
Understand channel loss mechanisms interpret and optimize eye diagrams and apply jitter analysis and mitigation techniques.
Demonstrate a thorough understanding of correlation methodologies and expertise in crosstalk analysis and reduction.
Possess a comprehensive grasp of Power Delivery Network (PDN) design and optimization.
Conduct extensive SIPI simulations (pre-layout and post-layout) to optimize signal integrity and power integrity performance at a system level.
Influence die changes based on simulation results to ensure optimal SIPI performance.
Implement and maintain robust SI/PI strategies throughout the product development lifecycle (die and package).
Proactively identify and address potential SIPI issues early in the design process.
Stay abreast of the latest industry trends emerging tools and methodologies in SIPI PDN design and SerDes transceiver development.
Provide technical guidance and mentorship to other SIPI engineers within the team.
Develop and refine methodologies for running simulations to ensure robust and reliable PDN systems.
Develop strategies and methodologies to guarantee robust performance of high-speed SerDes transceivers including equalization techniques and advanced jitter analysis.
Collaborate effectively with external partners suppliers and customers on SI/PI-related topics.
Actively contribute to the development of new design methodologies innovative tools and streamlined processes to continuously improve SIPI design efficiency and product performance.
Requirements/Qualifications:
Bachelor of Science (BS) degree in Electrical Engineering or Electronic Engineering is required. Master of Science (MS) degree in a relevant engineering field is preferable.
10 years of experience of practical hands-on experience directly related to Signal Integrity and Power Integrity (SIPI).
Extensive practical experience in Printed Circuit Board (PCB) design and layout principles.
High-Speed SerDes (Serializer/Deserializer) experience is highly desirable especially troubleshooting channel-related issues for 32G transceivers and beyond.
Demonstrated experience in resolving SI/PI-related challenges including Power Delivery Network (PDN) optimization and noise mitigation.
Build and construct system level topologies for co-sims on PDN and transceivers
Experience in performing package analysis and optimization (thermal and mechanical considerations) is a plus.
Robust understanding of system-level SIPI design methodologies and analysis techniques (die-level package-level board-level).
Proficiency in analyzing and optimizing signal and power integrity across different levels of integration.
Thorough understanding of PCB manufacturing processes (design to production).
Strong analytical and problem-solving skills.
In-depth understanding of S-Parameter extraction techniques and system-level channel modeling.
Expertise in via modeling connector Time Domain Reflectometry (TDR) analysis and stack-up analysis.
Adept at equalization techniques jitter analysis eye diagram analysis and addressing channel impairments (return loss insertion loss).
Strong hands-on experience with industry-standard Field Solvers: Ansys HFSS Ansys Siwave Mentor Graphics Hyperlynx and HSPICE Redhawk
Experience with simulation tools: Keysight ADS and Mentor Graphics Hyperlynx for pre- and post-layout simulation and analysis.
Hands-on experience with Vector Network Analyzers (VNAs) Time Domain Reflectometers (TDRs) Sampling and Real-Time Oscilloscopes Bit Error Rate Testers (BERTs) de-embedding techniques and jitter analysis equipment.
Preferred Qualifications:
Experience with IBIS-AMI modeling validation and correlation is a significant plus.
Travel Time:
0% - 25%Physical Attributes:
Feeling Hearing Reaching Seeing Talking Works AlonePhysical Requirements:
10%Standing 10%walking 80%Sitting 100% Inside-MF 8-5PMMicrochip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex gender identity sexual orientation race color religion national origin disability protected Veteran status age or any other characteristic protected by law.
For more information on applicable equal employment regulations please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.
To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
Required Experience:
Staff IC
Employment Type
Full-Time
